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Volumn 26, Issue 8, 2008, Pages 1094-1105

A novel Kohonen SOM-based image compression architecture suitable for moderate density FPGAs

Author keywords

FPGA based implementation; Image compression; Image quantization; Kohonen self organizing map

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; DIGITAL SIGNAL PROCESSING; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); IMAGE QUALITY; PARALLEL PROCESSING SYSTEMS; SELF ORGANIZING MAPS;

EID: 44549088870     PISSN: 02628856     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.imavis.2007.11.010     Document Type: Article
Times cited : (15)

References (14)
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  • 3
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    • T. Honkela, Self-organizing maps in natural language processing. PhD thesis, Helsinki University of Technology, Espoo, Finland. http://www.cis.hut.fi/~tho/thesis/.
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  • 5
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    • Design and implementation of an FPGA-based multiple-colour LED display board
    • Kurdthongmee W. Design and implementation of an FPGA-based multiple-colour LED display board. Journal of Microprocessors and Microsystems 29 (2005) 327-336
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    • Kurdthongmee, W.1
  • 6
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    • The hardware-based implementation of the colour palette generation stage of a colour image quantization algorithm
    • Kurdthongmee W. The hardware-based implementation of the colour palette generation stage of a colour image quantization algorithm. Journal of Microprocessors and Microsystems 30 (2006) 234-249
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    • Kurdthongmee, W.1
  • 7
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    • N.M. Nasrabadi, Y. Feng, Vector quantization of images based upon Kohonen self-organizing feature maps, in: Proceedings of IEEE ICNN, 1988, pp. I101-I108.
    • N.M. Nasrabadi, Y. Feng, Vector quantization of images based upon Kohonen self-organizing feature maps, in: Proceedings of IEEE ICNN, 1988, pp. I101-I108.
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    • Opencore Organization, Opencore's SD RAM Controller Module, .
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    • 0028732519 scopus 로고    scopus 로고
    • V. Peiris, B. Hochet, M. Declercq, Implementation of a fully parallel Kohonen map: a mixed analog digital approach, in: Proceedings of IEEE World Congress on Computational Intelligence, Orlando, FL, USA, 1994, pp. 2064-2069.
    • V. Peiris, B. Hochet, M. Declercq, Implementation of a fully parallel Kohonen map: a mixed analog digital approach, in: Proceedings of IEEE World Congress on Computational Intelligence, Orlando, FL, USA, 1994, pp. 2064-2069.
  • 11
    • 0037387537 scopus 로고    scopus 로고
    • A VLSI architecture for 3D self-organizing map based colour quantization and its FPGA implementation
    • Sudha N., Srikanthan T., and Mailachalam B. A VLSI architecture for 3D self-organizing map based colour quantization and its FPGA implementation. Journal of Systems Architecture 48 (2003) 337-352
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    • Sudha, N.1    Srikanthan, T.2    Mailachalam, B.3
  • 12
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    • An ASIC implementation of Kohonen's map based colour image compression
    • Sudha N. An ASIC implementation of Kohonen's map based colour image compression. Journal of Real-Time Imaging 10 (2004) 31-39
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  • 13
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    • D.Soudris, et al., Data-reuse and parallel embedded architecture for low-power, real-time multimedia applications, in: Proceedings of 10th International Workshop PATMOS, 2000, pp. 243-254.
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.