Implementation of a fully parallel Kohonen map: a mixed analog digital approach

IEEE International Conference on Neural Networks - Conference Proceedings

Volumn 4, Issue , 1994, Pages 2064-2069

  Peiris, Vincent ^a   Hochet, Bertrand ^a   Declercq, Michel ^a  

^a EPFL   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CMOS INTEGRATED CIRCUITS; DIGITAL SIGNAL PROCESSING; ENCODING (SYMBOLS); LEARNING SYSTEMS; LINEAR INTEGRATED CIRCUITS; MATHEMATICAL MODELS; PARALLEL PROCESSING SYSTEMS; TIME DOMAIN ANALYSIS; VECTORS;

KOHONEN MAP; NEIGHBORHOOD FUNCTION; NEURONS; SYNAPTIC WEIGHTS;

NEURAL NETWORKS;

EID: 0028732519     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)