Hierarchical approach to exact symbolic analysis of large analog circuits

Proceedings - Design Automation Conference

Volumn , Issue , 2004, Pages 860-863

  Tan, Sheldon X D ^a   Guo, Weikun ^a   Qi, Zhenyu ^a  

^a University of California Riverside   (United States)

Author keywords

Behavioral Modeling; Circuit Simulation; Symbolic Analysis

Indexed keywords

ALGORITHMS; COMPUTER SIMULATION; DECISION MAKING; ELECTRIC POTENTIAL; GAUSSIAN NOISE (ELECTRONIC); MATHEMATICAL MODELS; PARAMETER ESTIMATION;

ANALOG CIRCUITS; BEHAVIORAL MODELING; CIRCUIT SIMULATION; SYMBOLIC ANALYSIS;

NETWORKS (CIRCUITS);

EID: 4444375918     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/996566.996795     Document Type: Conference Paper

References (12)

1. F. V. Fernández and A. Rodríguez-Vázquez, "Symbolic analysis tools - the state of the art," in Proc. IEEE Int. Symp. on Circuits and Systems (ISCAS), 1996, pp. 798-801.
2. G. Gielen and W. Sansen, Symbolic Analysis for Automated Design of Analog Integrated Circuits. Kluwer Academic Publishers, 1991.
3. G. Gielen, P. Wambacq, and W. Sansen, "Symbolic analysis methods and applications for analog circuits: A tutorial overview," Proc. of IEEE, vol. 82, no. 2, pp. 287-304, Feb. 1994.
4. M. M. Hassoun and P. M. Lin, "A hierarchical network approach to symbolic analysis of large scale networks," IEEE Trans. on Circuits and Systems 1: Fundamental Theory and Applications, vol. 42, no. 4, pp. 201-211, April 1995.
5. P. M. Lin, Symbolic Network Analysis. Elsevier Science Publishers B.V., 1991.
6. _, "Sensitivity analysis of large linear networks using symbolic program," in Proc. IEEE Int. Symp. on Circuits and Systems (ISCAS), 1992, pp. 1145-1148.
7. S. J. Seda, M. G. R. Degrauwe, and W. Fichtner, "Lazy-expansion symbolic expression approximation in synap," in Proc. Int. Conf. on Computer Aided Design (ICCAD), Nov. 1992, pp. 310-317.
8. C.-J. Shi and X.-D. Tan, "Canonical symbolic analysis of large analog circuits with determinant decision diagrams," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 19, no. 1, pp. 1-18, Jan. 2000.
9. J. A. Starzky and A. Konczykowska, "Flowgraph analysis of large electronic networks," IEEE Trans. on Circuits and Systems, vol. 33, no. 3, pp. 302-315, March 1986.
10. S. X.-D. Tan, "A general s-domain hierarchical network reduction algorithm," in Proc. Int. Conf. on Computer Aided Design (ICCAD), 2003, pp. 650-657.
11. S. X.-D. Tan, Z. Qi, and H. Li, "Hierarchical modeling and simulation of large analog circuits," in Proc. European Design and Test Conf. (DATE), 2004.
12. X.-D. Tan and C.-J. Shi, "Hierarchical symbolic analysis of large analog circuits via determinant decision diagrams," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 19, no. 4, pp. 401-412, April 2000.