Novel and robust silicon-controlled rectifier (SCR) based devices for on-chip ESD protection

IEEE Electron Device Letters

Volumn 25, Issue 9, 2004, Pages 658-660

  Salcedo, Javier A ^a   Liou, Juin J ^a   Bernier, Joseph C ^b  

^a UNIVERSITY OF CENTRAL FLORIDA   (United States)

^b INTERSIL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CURRENT VOLTAGE CHARACTERISTICS; ELECTRIC BREAKDOWN; ELECTRIC CURRENTS; ELECTRIC POTENTIAL; ELECTROSTATICS; OPTIMIZATION; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE STRUCTURES; SEMICONDUCTOR JUNCTIONS;

ELECTROSTATIC DISCHARGE PROTECTION; HIGH HOLDING VOLTAGE SILICON CONTROLLED RECTIFIER; LOW VOLTAGE TRIGGER SILICON CONTROLLED RECTIFIER; ON CHIP PROTECTION; SILICON CONTROLLED RECTIFIER;

SOLID STATE RECTIFIERS;

EID: 4444372557     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2004.834736     Document Type: Article

References (6)

1. A. Chatterjee and T. Polgreen, "A low-voltage triggering SCR for on-chip ESD protection at output and input pads," IEEE Electron Device Lett., vol. 12, pp. 21-22, Jan. 1991.
2. A. Z. H. Wang and C.-H. Tsay, "On a dual-polarity on-chip electrostatic discharge protection structure," IEEE Trans. Electron Devices, vol. 48, pp. 978-984, May 2001.
3. M.-D. Ker and H.-H. Chang, "Cascode LVTSCR with tunable holding voltage for ESD protection in bulk CMOS technology without latchup danger," Solid-State Electron., vol. 44, pp. 425-445, 2000.
4. J. A. Salcedo, J. J. Liou, J. C. Bernier, and D. K. Whitney, "On-Chip Structure for Electrostatic Discharge (ESD) Protection," U.S. Patent filed 2004.
5. V. Vashchenko, A. Concannon, M. Ter Beek, and P. Hopper, "LVTSCR structure for latch-up free ESD protection of BiCMOS RF circuits," Microelectron. Reliab., vol. 43, pp. 61-69, 2003.
6. J. W. Swonger, "High Voltage Protection Circuits," U.S. Patent 5 663 860, Sep. 1997.