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Volumn , Issue , 2004, Pages 55-60

Modular scheduling of guarded atomic actions

Author keywords

Algorithms; Design; Languages; Verification

Indexed keywords

ALGORITHMS; INTERFACES (COMPUTER); MICROPROCESSOR CHIPS; NETWORKS (CIRCUITS); PROGRAM COMPILERS; REAL TIME SYSTEMS; SCHEDULING; SEMANTICS; SET THEORY;

EID: 4444327780     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/996566.996583     Document Type: Conference Paper
Times cited : (31)

References (16)
  • 1
    • 0345103140 scopus 로고    scopus 로고
    • Using term rewriting systems to design and verify processors
    • Arvind and Shen, X. Using term rewriting systems to design and verify processors. Micro, IEEE, 19 (3). 36-46.
    • Micro, IEEE , vol.19 , Issue.3 , pp. 36-46
    • Arvind1    Shen, X.2
  • 11
    • 4444349911 scopus 로고    scopus 로고
    • Dept. of Electrical Engineering and Computer Science, Massachusetts Institute of Technology
    • Hoe, J.C. Operation-centric hardware description and synthesis Dept. of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, 2000, 139 p.
    • (2000) Operation-centric Hardware Description and Synthesis , pp. 139
    • Hoe, J.C.1
  • 13
    • 84976663837 scopus 로고    scopus 로고
    • Specifying concurrent program modules
    • Lamport, L. Specifying Concurrent Program Modules. ACM Trans. Program. Lang. Syst., 5 (2). 190-222.
    • ACM Trans. Program. Lang. Syst. , vol.5 , Issue.2 , pp. 190-222
    • Lamport, L.1
  • 16
    • 4444231208 scopus 로고    scopus 로고
    • From high-level descriptions to VLSI circuits
    • Staunstrup, J. and Greenstreet, M.R. From High-Level Descriptions to VLSI Circuits. BIT, 28 (3). 620-638.
    • BIT , vol.28 , Issue.3 , pp. 620-638
    • Staunstrup, J.1    Greenstreet, M.R.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.