Action systems in pipelined processor design

Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems

Volumn , Issue , 1997, Pages 156-166

  Plosila, Juha ^a   Sere, Kaisa ^a  

^a UNIVERSITY OF TURKU   (Finland)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; LOGIC DESIGN; MATHEMATICAL OPERATORS; PIPELINE PROCESSING SYSTEMS;

ASYNCHRONOUS PIPELINED MICROPROCESSORS; REFINEMENT CALCULUS;

MICROPROCESSOR CHIPS;

EID: 0030708052     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (17)