Using term rewriting systems to design and verify processors

IEEE Micro

Volumn 19, Issue 3, 1999, Pages 36-46

  Arvind, ^a   Shen, Xiaowei ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; COMPUTATIONAL LINGUISTICS; COMPUTER SIMULATION; COMPUTER TESTING; DIGITAL ARITHMETIC; MATHEMATICAL MODELS; MULTIPROCESSING SYSTEMS; REDUCED INSTRUCTION SET COMPUTING; SYSTEMS ANALYSIS;

INSTRUCTION FETCH RULES; MICROARCHITECTURE; TERM REWRITING SYSTEMS;

MICROPROCESSOR CHIPS;

EID: 0345103140     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/40.768501     Document Type: Article

References (11)

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10. X. Shen and Arvind, "Design and Verification of Speculative Processors," Proc. Workshop on Formal Techniques for Hardware and Hardware-Like Systems, Marstrand, Sweden, June 1998; also appears as CSG Memo 400B, Laboratory for Computer Science, MIT, Cambridge, Mass., http://www.csg.lcs. mit.edu/pubs/csgmemo.html.
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