An economics model of supportability through design for testability

AUTOTESTCON (Proceedings)

Volumn , Issue , 2006, Pages 74-79

  Ungar, Louis Y ^a  

^a ATE Solutions Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ECONOMIC ANALYSIS; FAULT DETECTION; MATHEMATICAL MODELS; STANDARDS;

BUILT-IN SELF TEST (BIST); POST-MANUFACTURING SUPPORTABILITY;

DESIGN FOR TESTABILITY;

EID: 43549115499     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/AUTEST.2006.283603     Document Type: Conference Paper

References (5)

1. Dislis, C. et. al., Test Economics and Design for Testability for Electronic Circuits and Systems, Ellis Horwood, 1995.
2. Ungar, Louis Y. and Ambler, Tony, Economics of Built-in Self Test, IEEE Design & Test of Computers, September- October, 2001.
3. Ungar, Louis Y. and Parameswaran, Rajini, Knowledge Base to Manage the Grading and Selection of Testability Guidelines, Proceeding of AutoTestCon 2005, IEEE, September 2005.
4. Butler, Kenneth M. Estimating the Economic Benefits of DFT, IEEE Design & Test of Computers, January-March, 1999.
5. www.BestTest.com a test community web site by A.T.E. Solutions, Inc.