Identifying FPGA IP-cores based on lookup table content analysis

Proceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL

Volumn , Issue , 2006, Pages 481-486

  Ziener, Daniel ^a   Aßmus, Stefan ^a   Teich, Jürgen ^a  

^a UNIVERSITY OF ERLANGEN NUREMBERG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

(MIN ,MAX ,+) FUNCTIONS; CONTENT ANALYSIS; FIELD PROGRAMMABLE LOGIC (FPL); INTERNATIONAL CONFERENCES; IP CORES; IP PROTECTION; IP-CORES; LOOK UP TABLE (LUT); NET LIST; NEW METHODS; VIRTEX II; WIDE SPECTRUM; XILINX VIRTEX;

DIGITAL CIRCUITS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); FUZZY LOGIC; INTERCONNECTION NETWORKS; INTERNET PROTOCOLS;

TABLE LOOKUP;

EID: 43449090780     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPL.2006.311255     Document Type: Conference Paper

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