Chip-package co-design of common emitter LNA in system-on-package with on-chip versus off-chip passive component analysis

Electrical Performance of Electronic Packaging

Volumn , Issue , 2003, Pages 55-58

  Duo, Xinzhong ^a   Zheng, Li Rong ^a   Tenhunen, Hannu ^a  

^a ROYAL INSTITUTE OF TECHNOLOGY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); BICMOS TECHNOLOGY; ECONOMIC AND SOCIAL EFFECTS; ELECTRONICS PACKAGING; HETEROJUNCTION BIPOLAR TRANSISTORS; INTEGRATION; LOW NOISE AMPLIFIERS; NOISE FIGURE; SEMICONDUCTING SILICON; SYSTEM-ON-PACKAGE;

ANALYTICAL EQUATIONS; CHIP PACKAGE CODESIGN; COMPONENTS INTEGRATION; KEY PERFORMANCE PARAMETERS; PACKAGE PARASITICS; PERFORMANCE TRADE-OFF; SIGE BICMOS TECHNOLOGY; SYSTEM LEVEL INTEGRATION;

CHIP SCALE PACKAGES;

EID: 4344694862     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EPEP.2003.1249999     Document Type: Conference Paper

References (9)

1. A. Mtiguzawa "RF-SoC- expectations and required conditions, " IEEE Transactions on Microwave Theory and Techniques, Vol. 50: pp 245 - 253 Jan. 2002.
2. R. Turomala; V.K. Madisett; "System on chip or system on package?" IEEE Design & Test of Computers, Vol 16, pp 48 - 56, Apr-Jun 1999.
3. K.L Tai; "System-In-Package (SIP): challenges and opportunities, " Proceedings of the 2000 Asia and South Pacific Design Automation Conference, pp 191-196.
4. E. Davidson "SoC or SoP? A balanced approachl" Proceedings of 51st Electronic Components and Technology Conference, 2001" pp 529 -534, 29 May-1 June 2001.
5. K. Lim; S.Pinel; M.Davis; A.Suiono; C.-H. Lee; D. Heo; A. Obatoynbo,; J. Laskar, .E.M. Tantzeris; R. Tummala; "RF-system-on-packagc (SOP) for wireless communications, " IEEE Microwave Magazine, Vol 3, pp 88 -99, Mar 2002.
6. P. Wambacq, S. Donnay.; P. Pietcrs,; W. Diels, K. Vaesen, W. De Raedt, E Beync, M. Engels, I. Bolsens, "Chip-package co-design of a 5 GHz RF front-end for WLAN, " IEEE International 2000 Solid-State Circuits Conference, Digest of Technical Papers.
7. S. Donnay; P Pieters; K .Vaesen; W .Diels; P .Wambacq; W .De Raedt; E Beync; M .Engels, I .Bolsens; "Chip-package co-design of a low-power 5-GHz RF front-end" Proceedings of the IEEE, Vol 88, pp: 1583 -1597, Oct 2000.
8. M. Shen, L.-R. Zheng; H. Tenhunen, "Cost and performance analysis for mixed-signal system implementation: system-on-chip or system- or.-package?" IEEE Transactions on Electronics Packaging Manufacturing, Vol. 25, pp 262 -272, Oct. 2002.
9. T. H. Lee, The Design of CMOS Radio Frequency Integrated Circuits, Cambridge University Press. 2001.