Substrate noise-aware floorplanning for mixed-signal SOCs

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 2, Issue , 2004, Pages

  Jeske, Marcin ^a   Blakiewicz, Grzegorz ^a,b   Chrzanowska Jeske, Malgorzata ^a   Wang, Benyi ^a  

^a Department of Electrical and Computer Engineering   (United States)

^b GDANSK UNIVERSITY OF TECHNOLOGY   (Poland)

Author keywords

[No Author keywords available]

Indexed keywords

FLOORPLANNING; MIXED-SIGNAL SOCS; POWER DISSIPATION; SEQUENCE-PAIR (SP);

BENCHMARKING; COUPLED CIRCUITS; DATA STRUCTURES; ELECTRIC DISTORTION; ENERGY DISSIPATION; MATHEMATICAL MODELS; OPTIMIZATION; SIGNAL PROCESSING; SUBSTRATES;

SPURIOUS SIGNAL NOISE;

EID: 4344672936     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)

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