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Volumn , Issue , 2000, Pages 533-536

A new efficient method for substrate-aware device-level placement

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT COMPONENTS; DESIGN OPTIMIZATION; DEVICE-LEVEL PLACEMENT; HIGH FREQUENCY HF; NEW EFFICIENT METHOD; PERFORMANCE GAIN; PROBLEM INSTANCES; SUBSTRATE COUPLINGS;

EID: 0006916613     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/368434.368781     Document Type: Conference Paper
Times cited : (9)

References (9)
  • 1
    • 0028517306 scopus 로고
    • A simple approach to modeling cross-talk in integrated circuits
    • K. Joardar, "A simple approach to modeling cross-talk in integrated circuits," IEEE Journal of Solid-State Circuits, vol. 29, pp. 1212-1219, 1994.
    • (1994) IEEE Journal of Solid-State Circuits , vol.29 , pp. 1212-1219
    • Joardar, K.1
  • 2
    • 0027576336 scopus 로고
    • Experimental Results and Modeling Techniques for Substrate Noise in Mixed-Signal Integrated Circuits
    • April
    • D.K. Su, M.J. Loinaz. S. Masui, and B.A. Wooley, "Experimental Results and Modeling Techniques for Substrate Noise in Mixed-Signal Integrated Circuits," IEEE Journal of Solid-State Circuits, vol. 28, no. 4, pp. 420-430, April 1993.
    • (1993) IEEE Journal of Solid-State Circuits , vol.28 , Issue.4 , pp. 420-430
    • Su, D.K.1    Loinaz, M.J.2    Masui, S.3    Wooley, B.A.4
  • 3
    • 8344241821 scopus 로고
    • Measured Distortion of the Output-Waveform of an Integrated Opamp Due to Substrate Noise
    • J. Catrysse, "Measured Distortion of the Output-Waveform of an Integrated Opamp Due to Substrate Noise," IEEE Trans. on Electromagnetic Compatibility, vol. 37, pp. 310-312, 1995.
    • (1995) IEEE Trans. on Electromagnetic Compatibility , vol.37 , pp. 310-312
    • Catrysse, J.1
  • 5
    • 0021120760 scopus 로고
    • Corner Stitching: A Data-Structuring Technique for VLSI Layout Tools
    • January
    • J.K. Ousterhout, "Corner Stitching: A Data-Structuring Technique for VLSI Layout Tools," IEEE Transactions on Computer-Aided Design, vol. 3, no. 1, pp. 87-100, January 1984.
    • (1984) IEEE Transactions on Computer-Aided Design , vol.3 , Issue.1 , pp. 87-100
    • Ousterhout, J.K.1
  • 7
    • 0023983513 scopus 로고
    • TWO- AND THREE-DIMENSIONAL CALCULATION OF SUBSTRATE RESISTANCE
    • DOI 10.1109/16.2460
    • L. Deferm, C. Claes, and G.J. Declerck, "Two- and Three-Dimensional Calculation of Substrate Resistance," IEEE Transactions on Electron Devices, vol. 35, no. 3, pp. 339-352. March 1988. (Pubitemid 18612210)
    • (1988) IEEE Transactions on Electron Devices , vol.35 , Issue.3 , pp. 339-352
    • Deferm, L.1    Claeys, C.2    Declerck, G.J.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.