Gigahertz-range MCML multiplier architectures

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 2, Issue , 2004, Pages

  Srinivasan, Venkat ^a   Ha, Dong Sam ^a   Sulistyo, Jos B ^a  

^a VIRGINIA POLYTECHNIC INSTITUTE AND STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; FLIP FLOP CIRCUITS; GATES (TRANSISTOR); LOGIC CIRCUITS; THROUGHPUT; TREES (MATHEMATICS);

LATENCY; MULTIPLIER ARCHITECTURES; MULTIPLIER DESIGN; POWER CONSUMPTION;

MULTIPLYING CIRCUITS;

EID: 4344569763     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

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