High power density, high efficiency system two-stage power architecture for laptop computers

PESC Record - IEEE Annual Power Electronics Specialists Conference

Volumn , Issue , 2006, Pages

  Sun, Julu ^a   Xu, Ming ^a   Ying, Yucheng ^a   Lee, Fred C ^a  

^a State University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; COMPUTER GRAPHICS; DESIGN OF EXPERIMENTS; MICROPROCESSOR CHIPS; THERMAL ENERGY; VERIFICATION; VOLTAGE REGULATORS;

POWER ARCHITECTURE; POWER DENSITY; THERMAL DESIGN POWER (TDP);

LAPTOP COMPUTERS;

EID: 42449083766     PISSN: 02759306     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PESC.2006.1711768     Document Type: Conference Paper

References (9)

1. http://www.maxim-ic.com/solutions/notebook_computers/power_management
2. Y. Ren, et al, "Two-stage approach for 12 V VR," in IEEE Proc. APEC, 2004.
3. J. Wei, et al, "Two-Stage voltage regulator for laptop computer CPUs and the corresponding advanced control schemes to improve light-load performance", in IEEE Proc APEC, 2004.
4. M. Xu, et al, "Voltage divider and its application in the two-stage power architecture", in IEEE Proc APEC, 2006.
5. Intel mobile Pentium IV processor datasheet, Intel document number: 253028-004.
6. Henry Koertzen, "CPU VR Input Filter Design Considerations", ITS2004.
7. Max1545 datasheet, Maxim.
8. Y. Ren, et al, "Analysis of the power delivery path from the 12-V VR to the microprocessor", in IEEE Transactions on power Electronics, Nov. 2004.
9. C.M. Wildrick, et al, "A method of Defining Load Impedance Specifications for a Stable Distributed Power System", in IEEE Transactions on power Electronics, May 1995.