Model-based mask verification

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 6730, Issue , 2007, Pages

  Foussadier, Frank ^a   Sundermann, Frank ^a   Vacca, Anthony ^b   Wiley, Jim ^b   Chen, George ^b   Takigawa, Tadahiro ^b   Hayano, Katsuya ^c   Narukawa, Syougo ^c   Kawashima, Satoshi ^c   Mohri, Hiroshi ^c   Hayashi, Naoya ^c   Miyashita, Hiroyuki ^c   Trouiller, Y ^d   Robert, F ^a   Vautrin, F ^a   Kerrien, G ^a   Planchot, J ^a   Martinelli, C ^a   Di Maria, J L ^d   Farys, Vincent ^a  

^a STMICROELECTRONICS   (France)

^b Brion Technologies   (United States)

^c DAI NIPPON PRINTING CO LTD   (Japan)

^d CEA LETI   (France)

Author keywords

Modeling; OPC; Verification

Indexed keywords

COMPUTER SIMULATION; DATA REDUCTION; ETCHING; MATHEMATICAL MODELS;

MODELING ACCURACY; OPC;

VERIFICATION;

EID: 42149190208     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.752609     Document Type: Conference Paper

References (3)

1. Yu Cao et al, "Optimized hardware and software for fast full-chip simulation," Proc. SPIE Vol. 5754 pp. 407, 2004.
2. Peter Buck et al, "Methods for analyzing and compensating for systematic mask CD errors", Solid State Technology, December 2006.
3. Masaki Satake et al, "Evaluation of Lithography Simulation Model Accuracy for Hotspot-based Mask Quality Assurance," Proc. of SPIE Vol. 6607, 66071E, 2007.