Implementation complexity of bit permutation instructions

Conference Record of the Asilomar Conference on Signals, Systems and Computers

Volumn 1, Issue , 2003, Pages 879-886

  Shi, Zhijie Jerry ^a   Lee, Ruby B ^a  

^a Princeton University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BOOLEAN ALGEBRA; CAPACITANCE; COMPUTATIONAL COMPLEXITY; CRYPTOGRAPHY; ELECTRIC INVERTERS; LOGIC GATES; MICROPROCESSOR CHIPS; SORTING; TRANSISTORS;

ARBITARY BIT PERMUTATIONS; BIT PERMUTATION INSTRUCTIONS; BLOCK CIPHERS; DATA ENCRYPTION STANDARDS (DES); DATA-DEPENDENT ROTATION (DTR);

COMPUTER SCIENCE;

EID: 4143112195     PISSN: 10586393     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (18)

1. C. E. Shannon, "Communication Theory of Secrecy Systems", Bell System Tech. Journal, Vol. 28, pp. 656-715, October 1949
2. R.L. Rivest, "The RC5 encryption algorithm", Fast Software Encryption: Second International Workshop, volume 1008 of Lecture Notes in Computer Science, pp. 86-96, December 1994
3. B. Kaliski and Y.L. Yin. On differential and linear cryptanalysis of RC5. Lecture Notes in Computer Science 963, Advances in Cryptology - Crypto'95, pp.171-184, Springer-Verlag, 1995
4. Zhijie Shi and Ruby B. Lee, "Bit Permutation Instructions for Accelerating Software Cryptography", Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors, pp. 138-148, July 2000
5. Xiao Yang and Ruby B. Lee, "Fast Subword Permutation Instructions Using Omega and Flip Network Stages", Proceedings of the International Conference on Computer Design, pp. 15-22, September 2000
6. Xiao Yang, Manish Vachharajani and Ruby B. Lee, "Fast Subword Permutation Instructions Based on Butterfly Networks", Proceedings of Media Processors 1999 IS&T/SPIE Symposium on Electric Imaging: Science and Technology, pp. 80-86, January 2000
7. Ruby B. Lee, Zhijie Shi and Xiao Yang, "How a Processor can Permute n bits in O(1) cycles,", Proceedings of Hot Chips 14 - A symposium on High Performance Chips, August 2002
8. Zhijie Shi, Xiao Yang and Ruby B. Lee, "Arbitrary Bit Permutations in One or Two Cycles", Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors, June 2003
9. Ruby B. Lee, Zhijie Shi and Xiao Yang, "Efficient Permutation Instructions for Fast Software Cryptography", IEEE Micro, Vol. 21, No. 6, pp. 56-69, December 2001
10. Zhijie Shi and Ruby B. Lee, "Subword Sorting with Versatile Permutation Instructions", Proceedings of the International Conference on Computer Design (ICCD 2002), pp. 234-241, September 2002
11. Ruby B. Lee, Ronald L. Rivest, L. J. B. Robshaw, Z. J. Shi, and Y. L. Yin, "On permutation operations in cipher design", submitted for publication
12. Ivan Sutherland, Bob Sproull, David Harris, Logical Effort: Designing Fast CMOS Circuits, Morgan Kaufmann Publishers, 1999
13. R. Ho, K. Mai, and M. Horowitz, "The future of wires," Special Proceedings of IEEE, Vol. 89, No. 4, pp. 490-504, April 2001
14. MOSIS, "MOSIS Parameter Test Results (0.25 um)", http://www.mosis.org/cgi-bin/cgiwrap/umosis/swp/params/tsmc-025/ t25t_mm_non_epi_mtl-params.txt, June 2003
15. Artisan Components, Inc., TSMC 0.25um Process 2.5-Volt SAGE Standard Cell Library Databook, November 1999.
16. MOSIS, "MOSIS Parameter Test Results (0.18 um)", http://www.mosis.org/cgi-bin/cgiwrap/umosis/swp/params/tsmc-018/ t18h_mm_non_epi-params.txt, June 2003
17. Jan M. Rabaey, Digital integrated circuits: a design perspective, Prentice Hall, 1996
18. Neil Burgess, "New models of prefix adder topologies," to be published in Journal of VLSI Sigfnal Processing, 2004