3D nanowire gate-all-around transistors: Specific integration and electrical features

Solid-State Electronics

Volumn 52, Issue 4, 2008, Pages 519-525

  Dupre C ^a,b   Ernst, T ^a   Maffini Alvaro, V ^a   Delaye, V ^a   Hartmann, J M ^a   Borel, S ^a   Vizioz, C ^a   Faynot, O ^a   Ghibaudo, G ^b   Deleonibus, S ^a  

^a CEA LETI   (France)

^b IMEP LAHC   (France)

Author keywords

3D; Gate all around; Mobility; Nanowire

Indexed keywords

MOS DEVICES; NANOWIRES; SILICON; THREE DIMENSIONAL;

CURRENT GAIN; ELECTRICAL FEATURES; SELF-ALIGNED PROCESS;

TRANSISTORS;

EID: 40849134313     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2007.10.050     Document Type: Article

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