Thermal sensor allocation and placement for reconfigurable systems

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn , Issue , 2006, Pages 437-442

  Mukherjee, Rajarshi ^a   Mondal, Somsubhra ^b   Memik, Seda Ogrenci ^b  

^a SYNOPSYS INC   (United States)

^b Northwestern University   (United States)

Author keywords

Allocation; Placement; Sensor; Temperature

Indexed keywords

(I ,J) CONDITIONS; APPLICATION-SPECIFIC; COMPUTER-AIDED DESIGN; COMPUTING PLATFORMS; COMPUTING SYSTEMS; CURRENT TECHNOLOGIES; DIFFERENT SIZES; HARDWARE RESOURCES; HIGH POWER SYSTEMS; HOT SPOTTING; HOT-SPOTS; INTERNATIONAL CONFERENCES; LOCALIZED HEATING; LOGIC ARRAYS; MONITOR (CO); OF SENSORS; PROGRAMMABLE LOGIC ARRAY (PLA); RECONFIGURABLE SYSTEMS; REGULAR STRUCTURES; RELIABLE OPERATIONS; SENSOR ALLOCATION; SENSOR INFRASTRUCTURE; SENSOR LOCATIONS; TEMPERATURE MONITORING; TEMPERATURE SENSING; UNIFOR M DISTRIBUTION;

COMPUTER SYSTEMS; DESIGN; ELECTRIC POWER SYSTEMS; FUZZY LOGIC; MOBILE TELECOMMUNICATION SYSTEMS; MONITORING; SENSORS; STRUCTURAL DESIGN;

DETECTORS;

EID: 39749193751     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2006.320153     Document Type: Conference Paper

References (20)

1. Altera. Excalibur Device Overview.
2. Xilinx, PowerPC in Virtex-4 FX.
3. Lesea, A. and M. Alexander. Powering Xilinx FPGAs. 2002
4. Gunther, S., et al., Managing the impact of increasing microprocessor power consumption. Intel Technology Journal, February 2001.
5. Xilinx. Answers Database: Virtex/Virtex-E/Virtex-II/Virtex Pro/Virtex-4 - What are temperature-sensing diode pins (DXP and DXN, TDN and TDP)? 2005
6. Lopez-Buedo, S., .J. Garrido, and E.I. Boemo, Thermal Testing on Reconfigurable Computers. IEEE Design and Test of Computers, 2000. 17(1): p. 84-91.
7. Lopez-Buedo, S., J. Garrido, and E.I. Boemo, Dynamically Inserting, Operating, and Eliminating Thermal Sensors of FPGA-based Systems. IEEE Transactions on Components and Packaging Technologies, 2002. 25(4): p. 561-566.
8. Velusamy, S., et al. Monitoring Temperature in FPGA based SoCs. in International Conference on Computer Design. 2005.
9. Mukherjee, R., S. Mondal, and S.O. Memik. A Sensor Distribution Algorithm for FPGAs with Minimal Dynamic Reconfiguration Overhead, in To appear in International Conference on Engineering of Reconfigurable Systems and Algorithms. 2006.
10. Mondal, S., R. Mukherjee, and S.O. Memik. Fine-Grain Thermal Profiling and Sensor Insertion for FPGAs. in IEEE International Symposium on Circuits and Systems 2006.
11. MacQueen, J. Some Methods for Classification and Analysis of Multivariate Observations. in Fifth Berkeley Symposium on Mathematical Statistics and Probability. 1967.
12. Meguerdichian, S., et al. Coverage Problems in Wireless Ad-hoc Sensor Networks, in INFOCOM 2001.
13. Chvatal, V., A Combinatorial Theorem in Plane Geometry. Journal of Combinatorial Theory 1975.18: p. 39-41.
14. Sherwani, N.A., Algorithms for VLSI Physical Design Automation. 1995, Norwell, MA: Kluwer Academic Publisher.
15. Lopez-Buedo, S. and E. Boemo. Making Visible the Thermal Behaviour of Embedded Microprocessors on FPGAs: a Progress Report. in International Symposium on Field Programmable Gate Arrays. 2004.
16. Skadron, K., et al. Temperature-Aware Microarchitecture. in International Symposium on Computer Architecture. 2003.
17. Yang, Y., et al. Adaptive Chip-Package Thermal Analysis for Synthesis and Design. in Conference on Design, Automation, and Test in Europe. 2006.
18. Yang, S. Logic Synthesis and Optimization Benchmarks. 1991: Microelectronics Center of North Carolina.
19. Betz, V., J. Rose, and A. Marquardt, Architecture and CAD for Deep-Submicron FPGAs. 1999: Kluwer Academic Publishers.
20. Poon, K.K., Power Estimation for Field Programmable Gate Arrays, in Dept. of Electrical and Computer Engg. 1999, University of British Columbia.