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Volumn , Issue , 2006, Pages 4387-4390

Fine-grain thermal profiling and sensor insertion for FPGAs

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; DENSITY (SPECIFIC GRAVITY); MICROPROCESSOR CHIPS; NATURAL FREQUENCIES; SENSITIVITY ANALYSIS; SENSORS;

EID: 34547346711     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (16)

References (13)
  • 1
    • 2442608660 scopus 로고    scopus 로고
    • S. Lopez-Buedo. and B, Boemo, Making Visible the Thermal !Behaviour of !Embedded Microprocessors on PPGAs: a Progress Report, presented at International Symposium on Field Programmable Gate Arrays, 2004.
    • S. Lopez-Buedo. and "B, Boemo, "Making Visible the Thermal !Behaviour of !Embedded Microprocessors on PPGAs: a Progress Report," presented at International Symposium on Field Programmable Gate Arrays, 2004.
  • 2
    • 0033884672 scopus 로고    scopus 로고
    • S. Lopez-Buedo, J. Garrido, and E. I. Boemo, Thermal Testing on Reconfigurable Computers, IEEE Design and Test of Computers, 17, pp. 84.-91, 2000.
    • S. Lopez-Buedo, J. Garrido, and E. I. Boemo, "Thermal Testing on Reconfigurable Computers," IEEE Design and Test of Computers, vol 17, pp. 84.-91, 2000.
  • 6
    • 0141856885 scopus 로고    scopus 로고
    • Power Estimation for Field Programmable Gate Arrays,
    • MS Thesis in Dept. of Electrical and Computer Engg, University of British 'Columbia
    • K. K. Poon, "Power Estimation for Field Programmable Gate Arrays," MS Thesis in Dept. of Electrical and Computer Engg, University of British 'Columbia, 1999.
    • (1999)
    • Poon, K.K.1
  • 8
    • 0033688763 scopus 로고    scopus 로고
    • Low Power and High Performance Design Challenges in Future Technologies
    • presented at
    • V. De and S. Borkar, "Low Power and High Performance Design Challenges in Future Technologies," presented at Great Lake Symposium on VLSI, 2000.
    • (2000) Great Lake Symposium on VLSI
    • De, V.1    Borkar, S.2
  • 11
    • 34547322825 scopus 로고    scopus 로고
    • IBM CoreConnect Bus Architecture
    • IBM CoreConnect Bus Architecture, www.chips.ibm.com
  • 12
    • 34547265038 scopus 로고    scopus 로고
    • K.-J. Lee,i K. Skadron, and W. Huang, Analytical Mattel for Sensor Placement on Microprocessors, presented at International Conference On Computer Design, 2005.
    • K.-J. Lee,i K. Skadron, and W. Huang, "Analytical Mattel for Sensor Placement on Microprocessors," presented at International Conference On Computer Design, 2005.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.