A 3-transistor DRAM cell with gated diode for enhanced speed and retention time

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2006, Pages 184-185

  Luk, Wing K ^a   Cai, Jin ^a   Dennard, Robert H ^a   Immediato, Michael J ^a   Kosonocky, Stephen V ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); DIODES; STATIC RANDOM ACCESS STORAGE;

GATED DIODES; RETENTION TIME;

DYNAMIC RANDOM ACCESS STORAGE;

EID: 39749179073     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)

1. W. K. Luk and R. H. Dennard, A novel dynamic memory cell with internal voltage gain, IEEE Journal of Solid-State Circuits, pp. 884 - 894, April 2005.
2. W. K. Luk and R. H. Dennard, Gated diode amplifiers, IEEE Trans. on Circuits and Systems II: Express Briefs, pp. 266 - 270, May 2005.