A signal-integrity self-test concept for debugging nanometer CMOS ICs

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2006, Pages

  Petrescu, Violeta ^a   Pelgrom, Marcel ^a   Veendrick, Harry ^a   Pavithran, Praveen ^b   Wieling, Jean ^b  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

^b NXP SEMICONDUCTORS   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUIT TESTING; NANOTECHNOLOGY; PROGRAM DEBUGGING; SPURIOUS SIGNAL NOISE; TEMPERATURE CONTROL;

ANALOG MONITORS; SIGNAL-INTEGRITY SELF-TESTING; SUPPLY-NOISE MONITOR;

CMOS INTEGRATED CIRCUITS;

EID: 39749142777     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. M. Nourani, et al., "Detecting Signal-Overshoots for Reliability Analysis in High-Speed System-on-Chips," IEEE Trans, on Reliability, vol. 51, no. 4, pp. 494-504, Dec, 2002.
2. E. Alon, et al., "Circuits and Techniques for High-Resolution Measurement of On-Chip Power Supply Noise," IEEE J. Solid-State Circuits, vol. 40, no. 4, pp. 820-828, April, 2005.
3. D. Schinkel, et al., "A 1-V 15μW High-Precision Temperature Switch,"Proc. ESSCIRC, pp. 77-80, Sept., 2001.