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Volumn 40, Issue 4, 2005, Pages 820-827

Circuits and techniques for high-resolution measurement of on-chip power supply noise

Author keywords

Analog digital conversion; Power delivery validation; Random noise; Spectral measurement; Supply noise measurement

Indexed keywords

ANALOG TO DIGITAL CONVERSION; ELECTRIC IMPEDANCE; MICROPROCESSOR CHIPS; NETWORKS (CIRCUITS); POWER SUPPLY CIRCUITS; VARIABLE FREQUENCY OSCILLATORS; WAVEFORM ANALYSIS;

EID: 18744370810     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2004.842853     Document Type: Conference Paper
Times cited : (125)

References (9)
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    • Apr.
    • A. Muhtaroglu, G. Taylor, and T. Rahal-Arabi, "On-die droop detector for analog sensing of power supply noise," IEEE J. Solid-State Circuits, vol. 39, no. 4, pp. 651-660, Apr. 2004.
    • (2004) IEEE J. Solid-State Circuits , vol.39 , Issue.4 , pp. 651-660
    • Muhtaroglu, A.1    Taylor, G.2    Rahal-Arabi, T.3
  • 3
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    • An on-chip 100 GHz-sampling rate 8-channel sampling oscilloscope with embedded sampling clock generator
    • Feb.
    • M. Takamiya, M. Mizuno, and K. Nakamura, "An on-chip 100 GHz-sampling rate 8-channel sampling oscilloscope with embedded sampling clock generator," in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2002, p. 182.
    • (2002) IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers , pp. 182
    • Takamiya, M.1    Mizuno, M.2    Nakamura, K.3
  • 6
    • 0031621399 scopus 로고    scopus 로고
    • Applications of on-chip samplers for test and measurement of integrated circuits
    • Jun.
    • R. Ho et al., "Applications of on-chip samplers for test and measurement of integrated circuits," in IEEE Symp. VLSI Circuits Dig. Tech. Papers, Jun. 1998, pp. 138-139.
    • (1998) IEEE Symp. VLSI Circuits Dig. Tech. Papers , pp. 138-139
    • Ho, R.1
  • 7
    • 0037852911 scopus 로고    scopus 로고
    • A 0.4-4 Gb/s CMOS quad transceiver cell using on-chip regulated dual-loop PLLs
    • May
    • K.-Y. K. Chang et al., "A 0.4-4 Gb/s CMOS quad transceiver cell using on-chip regulated dual-loop PLLs," IEEE J. Solid-State Circuits, vol. 38, no. 5, pp. 747-754, May 2003.
    • (2003) IEEE J. Solid-State Circuits , vol.38 , Issue.5 , pp. 747-754
    • Chang, K.-Y.K.1
  • 8
    • 4544337869 scopus 로고    scopus 로고
    • Adaptive equalization and data recovery in a dual-mode (PAM2/4) serial link transceiver
    • Jun.
    • V. Stojanović et al., "Adaptive equalization and data recovery in a dual-mode (PAM2/4) serial link transceiver," in Symp. VLSI Circuits Dig. Tech. Papers, Jun. 2004, pp. 348-351.
    • (2004) Symp. VLSI Circuits Dig. Tech. Papers , pp. 348-351
    • Stojanović, V.1
  • 9
    • 4544382853 scopus 로고    scopus 로고
    • Common-mode backchannel signaling system for differential high-speed links
    • Jun.
    • A. Ho et al., "Common-mode backchannel signaling system for differential high-speed links," in Symp. VLSI Circuits Dig. Tech. Papers, Jun. 2004, pp. 352-355.
    • (2004) Symp. VLSI Circuits Dig. Tech. Papers , pp. 352-355
    • Ho, A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.