Device design and electron transport properties of uniaxially strained-SOI tri-gate nMOSFETs

IEEE Transactions on Electron Devices

Volumn 55, Issue 2, 2008, Pages 649-654

  Irisawa, Toshifumi ^a   Numata, Toshinori ^a   Tezuka, Tsutomu ^a   Usuda, Koji ^a   Sugiyama, Naoharu ^a   Takagi, Shin Ichi ^b  

^a NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY AIST   (Japan)

^b UNIVERSITY OF TOKYO   (Japan)

Author keywords

(1 1 0) surface; Silicon on insulator (SOI); Strained Si; Subband engineering; Trigate multigate MOSFET; Uniaxial strain

Indexed keywords

ANISOTROPY; CMOS INTEGRATED CIRCUITS; ELECTRON MOBILITY; ELECTRON TRANSPORT PROPERTIES; GATES (TRANSISTOR); SILICON ON INSULATOR TECHNOLOGY; TENSILE STRENGTH;

MULTIGATE MOSFET; SUBBAND ENGINEERING; TRIGATE MOSFET; UNIAXIAL STRAIN;

MOSFET DEVICES;

EID: 39749091276     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2007.913082     Document Type: Article

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