Characterization and modeling of long term retention in SONOS non volatile memories

ESSDERC 2007 - Proceedings of the 37th European Solid-State Device Research Conference

Volumn 2007, Issue , 2007, Pages 406-409

  Arreghini, A ^a   Akil, N ^b   Driussi, F ^a   Esseni, D ^a   Selmi, L ^a   Van Duuren, M J ^b  

^a UNIVERSITY OF UDINE   (Italy)

^b NXP SEMICONDUCTORS   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

CHARGE DISTRIBUTION; GATES (TRANSISTOR); MATHEMATICAL MODELS; SILICON NITRIDE; THRESHOLD VOLTAGE;

CHARGE LOSS MECHANISMS; CHARGE RETENTION; GATE STACKS; OPERATION TEMPERATURE;

SEMICONDUCTOR DEVICES;

EID: 39549101218     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSDERC.2007.4430964     Document Type: Conference Paper

References (12)

1. 2 cell size using TANOS cell technology", IEDM 2006 Tech. Digest, p. 29-32, 2006.
2. Y.H. Shih et al., "Highly scalable and reliable multi-bit/cell nitride trapping nonvolatile memory using enhanced ANS-ONO process with a nitridized interface", IEDM 2006 Tech. Digest, p. 503-506, 2006.
3. Y. Wang, M.H. White, "An analytical retention model for SONOS non-volatile memory devices in the excess electron state", Solid-State Electronics, vol. 49, pp. 97-107, 2005.
4. Y. Yang, M.H. White, "Charge retention of scaled SONOS nonvolatile memory devices at elevated temperatures", Solid-State Electronics, vol. 44, pp. 949-958, 2000.
5. S.- H. Gu et al., "Numerical simulation of bottom oxide thickness effect on charge retention in SONOS flash memory cells", IEEE T-ED, vol. 54, n.1, pp. 90-97, 2007.
6. A. Paul et al., "Comprehensive simulation of program, erase and retention in charge trapping flash memories", IEDM 2006 Tech. Digest, p. 393-396, 2006.
7. F. Libsch, M.H. White, "Charge transport and storage of low programming voltage SONOS/MONOS memory devices", Solid-State Electronics, vol. 33, pp. 105-126, 1990.
8. S. Fujita, A. Sasaki, "Dangling bonds in memory-quality silicon nitride films", J. Electrochem. Soc., pp. 398-402, 1985.
9. P.J. McWhorter et al., "Modeling the memory retention charateristics of silicon-nitride-oxide-silicon nonvolatile transistors in a varying thermal environment", JAP, vol. 68, n. 4, p. 1902-1909, 1990.
10. 4 films", Solid-State Electronics, vol. 48, pp. 477-482, 2004.
11. H. Bachhofer et al., "Transient conduction in multidielectric silicon-oxide-nitride-oxide-semiconductor structures", JAP, vol. 89, n. 5, p. 2791-2800, 2001.
12. A. Arreghini et al., "Experimental extraction of the charge centroid and of the charge type in the P/E operations of the SONOS memory cells", IEDM 2006 Tech. Digest, p. 499-502, 2006.