Statistical exploration of the dual supply voltage space of a 65nm PD/SOI CMOS SRAM cell

ESSDERC 2006 - Proceedings of the 36th European Solid-State Device Research Conference

Volumn , Issue , 2006, Pages 315-318

  Joshi, Rajiv ^a   Kanj, Rouwaida ^b   Nassif, Sani ^c   Plass, Donald ^c   Chan, Yuen ^c   Chuang, Ching Te ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b IBM AUSTIN RESEARCH LABORATORY   (United States)

^c IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC POTENTIAL; ELECTRIC POWER SYSTEMS; RANDOM PROCESSES; STATIC RANDOM ACCESS STORAGE; STATISTICAL METHODS; LOGIC DESIGN; SOLID STATE DEVICES;

BITLINE VOLTAGES; CELL POWER SUPPLY; SUPPLY VOLTAGE SPACE; DUAL SUPPLY; DUAL SUPPLY VOLTAGES; POWER SUPPLY; PROCESS VARIATION; SRAM CELL; SRAM DESIGN; WORDLINES;

CMOS INTEGRATED CIRCUITS; RECONFIGURABLE HARDWARE;

EID: 38949103292     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSDER.2006.307701     Document Type: Conference Paper

References (8)

1. J. Davis et al., "A 5.6GHz 64kB Dual-Read Data Cache for the POWER6™ Processor", ISSCC, pp. 33-34, 2006.
2. R. Kanj, R. Joshi, and S. Nassif, "Mixture Importance Sampling and Its Application to the Analysis of SRAM Designs in the Presence of Rare Failure Events", to appear in DAC '06
3. R. V. Joshi et al., "Variability analysis for Sub-100 nm PD/SOI CMOS SRAM cell", Proc. of the 30th ESSCC, 2004, pp. 211 - 214.
4. A. B. Hoenseisen and C. A. Mead, "Localized Variability: Random Dopant Fluctuations" Solid State Electronic, 1972.
5. S. Mukhopadhyay, H. Mahmoodi, and K. Roy, "Statistical design and optimization of SRAM cell for yield enhancement", ICCAD, 2004, pp. 10-13.
6. R. Kanj, R. Joshi, and S. Nassif, " Statistical Methods for SRAM Yield Estimation" to appear ACISC '06.
7. Y. Chen, R. Joshi, and D. Plass, "Integrated circuit chip with improved array stability", US Patent # US 2005/0063232 A1.
8. L. Hsu, R. V. Joshi, and R. Wong "Dynamic power (Vdd or gnd) boost based on operation (read or write)", US Patent # 6654277