An approach to model temperature effects of interface traps in 4H-SiC

Materials Science Forum

Volumn 556-557, Issue , 2007, Pages 497-500

  Rao, Ramakrishna ^a   Balaji, S ^b   Matocha, Kevin ^c   Tilak, Vinayak ^c  

^a GE GLOBAL RESEARCH   (India)

^b INDIAN INSTITUTE OF TECHNOLOGY MADRAS   (India)

^c GE GLOBAL RESEARCH   (United States)

Author keywords

MOS devices; Threshold voltage; Traps charge

Indexed keywords

ENERGY GAP; MOS DEVICES; MOSFET DEVICES; THRESHOLD VOLTAGE;

4H SILICON CARBIDE; BAND GAP NARROWING; INTERFACE TRAP DENSITY; INTERFACE TRAPS; LAYER CHARGE DENSITY; SIC/SIO2-INTERFACES; TEMPERATURE DEPENDENT; TRAPS CHARGE;

SILICON CARBIDE;

EID: 38449111941     PISSN: 02555476     EISSN: 16629752     Source Type: Book Series    
DOI: 10.4028/www.scientific.net/MSF.556-557.497     Document Type: Conference Paper

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