Phenomena and OPC solution of ripple patterns for 65nm node

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 5377, Issue PART 2, 2004, Pages 1165-1171

  Lai, C M ^a   Ho, J S ^a   Lai, C W ^a   Tsai, C K ^a   Tsay, C S ^a   Chen, J H ^a   Liu, R G ^a   Ku, Y C ^a   Lin, Burn J ^a  

^a TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

Author keywords

65nm generation; OPC; Ripple patterns; Side lobe

Indexed keywords

COMPUTER SIMULATION; DISTANCE MEASUREMENT; IMAGE PROCESSING; IMAGE SEGMENTATION; NETWORKS (CIRCUITS); OPTICAL RESOLVING POWER; PHASE SHIFT; PROBLEM SOLVING;

OFF-AXIS ILLUMINATION; RESOLUTION ENHANCEMENT TECHNOLOGY (RET); RIPPLE PATTERNS; SIDE-LOBES;

LITHOGRAPHY;

EID: 3843105674     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.544250     Document Type: Conference Paper

References (3)

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2. Kevin Lucas, et. al. "Model-based design improvements for the 100nm lithography generation", Proc. SPIE Vol. 4691, pp. 215-226, 2002.
3. N. Cobb, A Zakhor, "A mathematical and CAD framework for proximity correction", SPIE, 2766, pp. 208-222, 1996.