FEM-based method to determine mechanical stress evolution during process flow in microelectronics. application to stress -voiding

Proceedings of the 5th International Conference on Thermal and Mechanical Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2004

Volumn , Issue , 2004, Pages 47-52

  Orain, S ^a   Barbe J C ^b   Federspiel, X ^a   Legallo, P ^c   Jaouen, H ^d  

^a NXP SEMICONDUCTORS   (Netherlands)

^b CEA LETI   (France)

^c CEA GRENOBLE   (France)

^d STMICROELECTRONICS   (France)

Author keywords

[No Author keywords available]

Indexed keywords

PROCESS FLOW; STRESS LEVELS; STRESS-INDUCED VOIDING; THERMAL RAMPING;

CHEMICAL MECHANICAL POLISHING; COMPUTER SIMULATION; ETCHING; FAILURE (MECHANICAL); FINITE ELEMENT METHOD; HYDROSTATIC PRESSURE; INTERCONNECTION NETWORKS; INTERFACES (MATERIALS); MOSFET DEVICES; OPTIMIZATION; STRESS ANALYSIS; VLSI CIRCUITS;

MICROELECTRONICS;

EID: 3843088398     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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