A coprocessor for the final exponentiation of the ηT pairing in characteristic three

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 4547 LNCS, Issue , 2007, Pages 25-39

  Beuchat, Jean Luc ^a   Brisebarre, Nicolas ^b,c   Shirase, Masaaki ^d   Takagi, Tsuyoshi ^d   Okamoto, Eiji ^a  

^a UNIVERSITY OF TSUKUBA   (Japan)

^b UNIVERSITÉ JEAN MONNET   (France)

^c UNIVERSITÉ DE LYON   (France)

^d FUTURE UNIVERSITY HAKODATE   (Japan)

Author keywords

Characteristic three; Final exponentiation; FPGA; Hardware accelerator; t pairing

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER HARDWARE; CRYPTOGRAPHY; FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

CHARACTERISTIC THREE; FINAL EXPONENTIATION; HARDWARE ACCELERATOR;

PROGRAM PROCESSORS;

EID: 38149033707     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-73074-3_4     Document Type: Conference Paper

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