A UMTS-compliant fully digitally controlled oscillator with 100Mhz fine-tuning range in 0.13μm CMOS

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2006, Pages

  Pittorino, T ^a   Chen, Y ^b   Neubauer, V ^c   Mayer, T ^a   Maurer, L ^c  

^a JOHANNES KEPLER UNIVERSITY LINZ   (Austria)

^b LINZ CENTER OF MECHATRONICS GMBH   (Austria)

^c DICE GmbH & Co KG   (Austria)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; CMOS INTEGRATED CIRCUITS; DIGITAL CONTROL SYSTEMS; PHASE NOISE; THERMOMETERS; TUNING;

DIGITALLY CONTROLLED OSCILLATORS; SWITCHABLE CAPACITORS; TUNING RANGE;

CIRCUIT OSCILLATIONS;

EID: 37149045735     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

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2. J. Dunning et al., "An All-Digital Phase-Locked-Loop with 50-cycle Lock Time Suitable for High Performance Microprocessors," IEEE J. Solid-State Circuits, vol 30, pp. 412-422, Apr., 1995.
3. R. B. Staszewski et al., "A First Multigigahertz Digitally Controlled Oscillator for Wireless Applications," IEEE T. Microwave Theory and Techniques, vol. 51, pp. 2154-2164, Nov., 2003.
4. R. B. Staszewski et al., "A First RF Digitally Controlled Oscillator for Mobile Phones," IEEE RF IC Symposium, pp. 119-122, June, 2005.
5. N. Da Dalt et al., "A Low Jitter Triple-Band Digital LC PLL in 130nm CMOS," ESSCIRC, pp. 371-374, Sept., 2004.
6. A. M. Ismail, A. A. Abidi "CMOS Differential LC Oscillator with suppressed Up-converted Flicker Noise," ISSCC Dig. Tech. Papers, pp 98-99