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Volumn , Issue , 2007, Pages 506-507

A low-power high-speed 4-bit ADC for DS-UWB communications

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPARATOR CIRCUITS; ELECTRIC RESISTANCE; FLASH MEMORY; LOW NOISE AMPLIFIERS; TELECOMMUNICATION SYSTEMS;

EID: 36348944454     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISVLSI.2007.7     Document Type: Conference Paper
Times cited : (3)

References (6)
  • 1
    • 36349008561 scopus 로고    scopus 로고
    • A/D precision requirements for an ultra-wideband radio receiver
    • October
    • P. P. Newaskar, R. Blazquez and A. P. Chandrakasan, "A/D precision requirements for an ultra-wideband radio receiver", SIPS, pp. 270-275, October 2002.
    • (2002) SIPS , pp. 270-275
    • Newaskar, P.P.1    Blazquez, R.2    Chandrakasan, A.P.3
  • 2
    • 36349025692 scopus 로고    scopus 로고
    • A 4-bit analog-to-digital converter for high-speed serial links
    • April
    • S. Naraghi and D. Johns, "A 4-bit analog-to-digital converter for high-speed serial links," Micronet Annual Workshop, pp. 33-34, April 2004.
    • (2004) Micronet Annual Workshop , pp. 33-34
    • Naraghi, S.1    Johns, D.2
  • 3
    • 4644340759 scopus 로고    scopus 로고
    • Blind adaptive equalization of mismatch errors in a time-interleaved A/D converter system
    • Regular Papers, January
    • Jonas Elbornsson, Fredrik Gustafsson, and Jan-Erik Eklund "Blind adaptive equalization of mismatch errors in a time-interleaved A/D converter system," IEEE Transactions on Circuits and Systems-I: Regular Papers, Vol. 51, No. 1, pp.151-158, January 2004.
    • (2004) IEEE Transactions on Circuits and Systems-I , vol.51 , Issue.1 , pp. 151-158
    • Elbornsson, J.1    Gustafsson, F.2    Eklund, J.3
  • 4
    • 1242288219 scopus 로고    scopus 로고
    • A 13.5-mW 5-GHz Frequency Synthesizer With Dynamic-Logic Frequency D ivider
    • February
    • S. Pellerano, S. Levantino, C. Samori and A. L. Lacaita, "A 13.5-mW 5-GHz Frequency Synthesizer With Dynamic-Logic Frequency D ivider," IEEE J. Solid-State Circuits, Vol. 39, pp. 78-83, February 2004
    • (2004) IEEE J. Solid-State Circuits , vol.39 , pp. 78-83
    • Pellerano, S.1    Levantino, S.2    Samori, C.3    Lacaita, A.L.4
  • 5
    • 0032316106 scopus 로고    scopus 로고
    • A CMOS 6-b, 400-MSample/s ADC with Error Correction
    • December
    • Sanroku Tsukamoto, William G. Schofield, and Toshiaki Endo "A CMOS 6-b, 400-MSample/s ADC with Error Correction" IEEE J. Solid-State Circuits, Vol. 33, No. 12, December 1998.
    • (1998) IEEE J. Solid-State Circuits , vol.33 , Issue.12
    • Tsukamoto, S.1    Schofield, W.G.2    Endo, T.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.