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Volumn 33, Issue 12, 1998, Pages 1939-1947

A CMOS 6-b, 400-MSample/s ADC with error correction

Author keywords

Analog digital conversion; CMOS analog integrated circuits; Encoding; Error correction; Error correction coding; Error detection coding; Gray codes

Indexed keywords

ANALOG TO DIGITAL CONVERSION; CHOPPERS (CIRCUITS); CMOS INTEGRATED CIRCUITS; COMPARATOR CIRCUITS; ERROR CORRECTION; ERROR DETECTION;

EID: 0032316106     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.735534     Document Type: Article
Times cited : (38)

References (22)
  • 1
    • 0028734254 scopus 로고
    • A 100 MHz A/D interface for PRML magnetic disk read channels
    • Dec.
    • G. T. Uehara and P. R. Gray, "A 100 MHz A/D interface for PRML magnetic disk read channels." IEEE J. Solid-State Circuits, vol. 29, pp. 1606-1613, Dec. 1994.
    • (1994) IEEE J. Solid-State Circuits , vol.29 , pp. 1606-1613
    • Uehara, G.T.1    Gray, P.R.2
  • 3
    • 0030411456 scopus 로고    scopus 로고
    • An 80-MHz, 80-mW, 8-b CMOS folding A/D convener with distributed track-and-hold preprocessing
    • Dec.
    • A. G. W. Venes and R. J. van de Plassche, "An 80-MHz, 80-mW, 8-b CMOS folding A/D convener with distributed track-and-hold preprocessing," IEEE J. Solid-Stale Circuits, vol. 31, pp. 1846-1853, Dec. 1996.
    • (1996) IEEE J. Solid-Stale Circuits , vol.31 , pp. 1846-1853
    • Venes, A.G.W.1    Van De Plassche, R.J.2
  • 4
    • 0030241345 scopus 로고    scopus 로고
    • CMOS folding A/D converters with current-mode interpolation
    • Sept.
    • M. Flynn and D. Allstot. "CMOS folding A/D converters with current-mode interpolation," IEEE J. Solid-State Circuits, vol. 31, pp. 1248-1257, Sept. 1996.
    • (1996) IEEE J. Solid-State Circuits , vol.31 , pp. 1248-1257
    • Flynn, M.1    Allstot, D.2
  • 6
    • 0031683729 scopus 로고    scopus 로고
    • A 5.75b 350 Msample/s or 6.75b 150 Msample/s reconfigurable flash ADC for a PRML read channel
    • Feb.
    • P. Setty, J. Banner, J. Plany, H. Burger, and J. Sonntag, "A 5.75b 350 Msample/s or 6.75b 150 Msample/s reconfigurable flash ADC for a PRML read channel," in ISSCC Dig. Tech. Papers, Feb. 1998, pp. 148-149.
    • (1998) ISSCC Dig. Tech. Papers , pp. 148-149
    • Setty, P.1    Banner, J.2    Plany, J.3    Burger, H.4    Sonntag, J.5
  • 7
    • 0031700804 scopus 로고    scopus 로고
    • A 400 Msample/s 6b CMOS Folding and Interpolating ADC
    • Feb.
    • M. Flynn and B. Sheahan. "A 400 Msample/s 6b CMOS Folding and Interpolating ADC," in ISSCC Dig. Tech. Papers, Feb. 1998, pp. 150-151.
    • (1998) ISSCC Dig. Tech. Papers , pp. 150-151
    • Flynn, M.1    Sheahan, B.2
  • 9
    • 3843071111 scopus 로고
    • A 6-bit 125 MHz CMOS A/D converter
    • May
    • K. McCall, M. Demler, and M. Plante. "A 6-bit 125 MHz CMOS A/D converter." in Proc. CICC, May 1992, pp. 16.8.1-16.8.4.
    • (1992) Proc. CICC
    • McCall, K.1    Demler, M.2    Plante, M.3
  • 10
    • 0030086661 scopus 로고    scopus 로고
    • A 200 Msample/s 6b flash ADC in 0.6 μm CMOS
    • Feb.
    • J. Spalding and D. Dalton, "A 200 Msample/s 6b flash ADC in 0.6 μm CMOS," in ISSCC Dig. Tech. Papers, Feb. 1996, pp. 320-321.
    • (1996) ISSCC Dig. Tech. Papers , pp. 320-321
    • Spalding, J.1    Dalton, D.2
  • 12
    • 0031702318 scopus 로고    scopus 로고
    • A continuously-calibrated 10 Msample/s 12b 3.3 V ADC
    • Feb.
    • J. Ingino, Jr, and B. A. Wooley, "A continuously-calibrated 10 Msample/s 12b 3.3 V ADC," in ISSCC Dig. Tech. Papers, Feb. 1998, pp. 144-145.
    • (1998) ISSCC Dig. Tech. Papers , pp. 144-145
    • Ingino Jr., J.1    Wooley, B.A.2
  • 14
    • 0024122311 scopus 로고
    • Si bipolar 2-GHz 6-bit flash A/D conversion LSI
    • Dec.
    • T. Wakimoto, Y. Akazawa, S. Konaka, "Si bipolar 2-GHz 6-bit flash A/D conversion LSI," IEEE J. Solid-State Circuits, vol. 23, pp. 1345-1350, Dec. 1988.
    • (1988) IEEE J. Solid-State Circuits , vol.23 , pp. 1345-1350
    • Wakimoto, T.1    Akazawa, Y.2    Konaka, S.3
  • 16
    • 0025382888 scopus 로고
    • A 400-MHz input flash converter with error correction
    • Feb.
    • C. W. Mangelsdorf, "A 400-MHz input flash converter with error correction," IEEE J. Solid-State Circuits, vol. 25, pp. 184-191, Feb. 1990.
    • (1990) IEEE J. Solid-State Circuits , vol.25 , pp. 184-191
    • Mangelsdorf, C.W.1
  • 17
    • 0024646040 scopus 로고
    • A dual 4-bit, 2-GS/s analog-to-digital converter using a 70-ps silicon bipolar technology with borosenic-poly process and coupling-base implant
    • Apr.
    • V. E. Garuts, Y. S. Yu, E. O. Traa, and T. Yamaguchi, "A dual 4-bit, 2-GS/s analog-to-digital converter using a 70-ps silicon bipolar technology with borosenic-poly process and coupling-base implant," IEEE J. Solid-State Circuits, vol. 24, pp. 216-222, Apr. 1989.
    • (1989) IEEE J. Solid-State Circuits , vol.24 , pp. 216-222
    • Garuts, V.E.1    Yu, Y.S.2    Traa, E.O.3    Yamaguchi, T.4
  • 19
    • 0003135251 scopus 로고
    • A technique for reducing differential nonlinearity errors in flash A/D convertres
    • Feb.
    • K. Kattmann and J. Barrow, "A technique for reducing differential nonlinearity errors in flash A/D convertres, " in ISSCC Dig. Tech. Papers, Feb. 1991, pp. 170-171.
    • (1991) ISSCC Dig. Tech. Papers , pp. 170-171
    • Kattmann, K.1    Barrow, J.2
  • 21
    • 0030085311 scopus 로고    scopus 로고
    • Fully-integrated 5 V CMOS system for a 20 Msample/s sampling oscilloscope
    • Feb.
    • M. Krauß et al., "Fully-integrated 5 V CMOS system for a 20 Msample/s sampling oscilloscope," in ISSCC Dig. Tech. Papers, Feb. 1996, pp. 384-385.
    • (1996) ISSCC Dig. Tech. Papers , pp. 384-385
    • Krauß, M.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.