Chip scale module package for WLAN module application

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2007, Pages 1409-1414

  Liu, Kai ^a   Frye, Robert C ^b   Guruprasad, Badakere ^c   Chelvam, Marimuthu P ^c   Dunlap, Brett ^a   Gongora, Eric ^a  

^a STATS ChipPAC Ltd   (United States)

^b RF Design Consulting LLC   (United States)

^c STATS CHIPPAC LTD   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; ELECTROMAGNETIC WAVES; ELECTRONIC STRUCTURE; PASSIVE NETWORKS; SEMICONDUCTING SILICON COMPOUNDS; WIRELESS LOCAL AREA NETWORKS (WLAN);

CHIP SCALE MODULE PACKAGE (CSMP); DESIGN TOOLS; INTEGRATED PASSIVE DEVICE (IPD) TECHNOLOGY;

CHIP SCALE PACKAGES;

EID: 35348826632     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2007.373979     Document Type: Conference Paper

References (9)

1. th ECTC, June 2004, pp. 17-23.
2. th ECTC, May 2006, pp. 806-813.
3. Lee, B., et al, "New 3D chip stacking SiP technology by wire-on-bump and bump-on-flex," in Proc. of 56 ECTC, May 2006, pp. 819-824.
4. th ECTC, May 2006, pp. 825-830.
5. th ECTC, May 2006, pp. 1331-1337.
6. Frye, R. C., Liu, K., Badakere, G., and Lin, Y., "A Hybrid Coupled-Resonator Bandpass Filter Topology," accepted by IEEE IMS Conference, June 2007.
7. Liu, K., Frye, R. C., "Small form-factor Integrated Passive Devices for SiP Application," accepted by IEEE IMS Conference, June 2007.
8. Frye, R. C., Lin, Y., Badakere, G., Dunlap, B., and Gongora, E., "The impact of SiP performance and form-factor requirements on IPD technology," in Proc. of International Symposium on Microelectronics, Oct. 2006, pp. 590-595.
9. th IEEE Topical Meeting on Electrical Performance of Electronic Packaging, Oct. 2006, pp. 327-330.