Design of low-power double edge-triggered flip-flop circuit

ICIEA 2007: 2007 Second IEEE Conference on Industrial Electronics and Applications

Volumn , Issue , 2007, Pages 2054-2057

  Yu, Chien Cheng ^a  

^a HSIUPING INSTITUTE OF TECHNOLOGY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ENERGY CONSERVATION; TRANSISTORS;

DATA RATES; DOUBLE EDGE-TRIGGERED (DET) FLIP-FLOP; POWER SAVING;

FLIP FLOP CIRCUITS;

EID: 35248889461     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICIEA.2007.4318771     Document Type: Conference Paper

References (8)

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2. M. Pedram, Q. Wu, and X. Wu, "A new design of double edge-triggered flip-flops," in Proc. Asia and South Pacific Design automation conference (ASP DAC), 1998, pp. 417-421.
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