메뉴 건너뛰기




Volumn 3133, Issue , 2004, Pages 192-202

The Virtex II Pro™ MOLEN processor

Author keywords

[No Author keywords available]

Indexed keywords

COPROCESSOR; EMBEDDED SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); RECONFIGURABLE HARDWARE;

EID: 35048898018     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-27776-7_21     Document Type: Article
Times cited : (6)

References (11)
  • 2
    • 85013607448 scopus 로고    scopus 로고
    • Napa C: Compiling for a Hybrid RISC/FPGA Architecture
    • M. Gokhale and J. Stone. Napa C: Compiling for a Hybrid RISC/FPGA Architecture. In Proc. IEEE Symp. on FCCM, pp. 126-135, 1998.
    • (1998) Proc. IEEE Symp. on FCCM , pp. 126-135
    • Gokhale, M.1    Stone, J.2
  • 5
    • 35248845643 scopus 로고    scopus 로고
    • Arbitrating Instructions in an ρμ-coded CCM
    • Proc. 13th Intl. Conf. FPL'03, Springer-Verlag
    • G. Kuzmanov and S. Vassiliadis. Arbitrating Instructions in an ρμ-coded CCM. In Proc. 13th Intl. Conf. FPL'03, Springer-Verlag LNCS, vol. 2778, pp. 81-90, 2003.
    • (2003) LNCS , vol.2778 , pp. 81-90
    • Kuzmanov, G.1    Vassiliadis, S.2
  • 6
    • 14244251751 scopus 로고    scopus 로고
    • Hardware/Software Design Space Exploration for a Reconfigurable Processor
    • A. L. Rosa, L. Lavagno, and C. Passerone. Hardware/Software Design Space Exploration for a Reconfigurable Processor. In Proc. DATE 2003, pp. 570-575, 2003.
    • (2003) Proc. DATE 2003 , pp. 570-575
    • Rosa, A.L.1    Lavagno, L.2    Passerone, C.3
  • 9
    • 84949189232 scopus 로고    scopus 로고
    • The MOLEN ρμ-Coded Processor
    • 11th Intl. Conf. FPL'01, Springer-Verlag
    • S. Vassiliadis, S. Wong, and S. Cotofana. The MOLEN ρμ-Coded Processor. In 11th Intl. Conf. FPL'01, Springer-Verlag LNCS, vol. 2147, pp. 275-285, 2001.
    • (2001) LNCS , vol.2147 , pp. 275-285
    • Vassiliadis, S.1    Wong, S.2    Cotofana, S.3
  • 11
    • 0033718671 scopus 로고    scopus 로고
    • A C Compiler for a Processor with a Reconfigurable Functional Unit
    • A. Ye, N. Shenoy, and P. Banerjee. A C Compiler for a Processor with a Reconfigurable Functional Unit. In ACM/SIGDA Symp. on FPGAs, pp. 95-100, 2000.
    • (2000) ACM/SIGDA Symp. on FPGAs , pp. 95-100
    • Ye, A.1    Shenoy, N.2    Banerjee, P.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.