-
1
-
-
0037630866
-
A VLIW Processor with Reconfigurable Instruction Set for Embedded Applications
-
Feb
-
F. Campi, M. Toma, A. Lodi, A. Cappelli, R. Canegallo, and R. Guerreri. A VLIW Processor with Reconfigurable Instruction Set for Embedded Applications. In ISSCC Digest of Technical Papers, pp. 250-251, Feb 2003.
-
(2003)
ISSCC Digest of Technical Papers
, pp. 250-251
-
-
Campi, F.1
Toma, M.2
Lodi, A.3
Cappelli, A.4
Canegallo, R.5
Guerreri, R.6
-
2
-
-
85013607448
-
Napa C: Compiling for a Hybrid RISC/FPGA Architecture
-
M. Gokhale and J. Stone. Napa C: Compiling for a Hybrid RISC/FPGA Architecture. In Proc. IEEE Symp. on FCCM, pp. 126-135, 1998.
-
(1998)
Proc. IEEE Symp. on FCCM
, pp. 126-135
-
-
Gokhale, M.1
Stone, J.2
-
3
-
-
0031376640
-
The Chimaera Reconfigurable Functional Unit
-
S. Hauck, T. Fry, M. Hosler, and J. Kao. The Chimaera Reconfigurable Functional Unit. In Proc. IEEE Symp. on FCCM, pp. 87-96, 1997.
-
(1997)
Proc. IEEE Symp. on FCCM
, pp. 87-96
-
-
Hauck, S.1
Fry, T.2
Hosler, M.3
Kao, J.4
-
4
-
-
35048831851
-
Loading rm-code: Design considerations
-
G. Kuzmanov, G. N. Gaydadjiev, and S. Vassiliadis. Loading rm-code: Design considerations. In Proc. Third Intl. Workshop on Systems, Architectures, Modeling, and Simulation (SAMOS'03), pp 8-11, 2003.
-
(2003)
Proc. Third Intl. Workshop on Systems, Architectures, Modeling, and Simulation (SAMOS'03)
, pp. 8-11
-
-
Kuzmanov, G.1
Gaydadjiev, G.N.2
Vassiliadis, S.3
-
5
-
-
35248845643
-
Arbitrating Instructions in an ρμ-coded CCM
-
Proc. 13th Intl. Conf. FPL'03, Springer-Verlag
-
G. Kuzmanov and S. Vassiliadis. Arbitrating Instructions in an ρμ-coded CCM. In Proc. 13th Intl. Conf. FPL'03, Springer-Verlag LNCS, vol. 2778, pp. 81-90, 2003.
-
(2003)
LNCS
, vol.2778
, pp. 81-90
-
-
Kuzmanov, G.1
Vassiliadis, S.2
-
6
-
-
14244251751
-
Hardware/Software Design Space Exploration for a Reconfigurable Processor
-
A. L. Rosa, L. Lavagno, and C. Passerone. Hardware/Software Design Space Exploration for a Reconfigurable Processor. In Proc. DATE 2003, pp. 570-575, 2003.
-
(2003)
Proc. DATE 2003
, pp. 570-575
-
-
Rosa, A.L.1
Lavagno, L.2
Passerone, C.3
-
7
-
-
8744284139
-
The molen programming paradigm
-
S. Vassiliadis, G. N. Gaydadjiev, K. Bertels, and E. M. Panainte. The molen programming paradigm. In Proc. Third Intl. Workshop on Systems, Architectures, Modeling, and Simulation (SAMOS'03), pp. 1-7, 2003.
-
(2003)
Proc. Third Intl. Workshop on Systems, Architectures, Modeling, and Simulation (SAMOS'03)
, pp. 1-7
-
-
Vassiliadis, S.1
Gaydadjiev, G.N.2
Bertels, K.3
Panainte, E.M.4
-
8
-
-
85046952799
-
The Sum-of-Absolute-Difference Motion Estimation Accelerator
-
S. Vassiliadis, E. Hakkennes, S. Wong, and G. Pechanek. The Sum-of-Absolute-Difference Motion Estimation Accelerator. In Proc. 24th Euromicro Conf., pp. 559-566, 1998.
-
(1998)
Proc. 24th Euromicro Conf.
, pp. 559-566
-
-
Vassiliadis, S.1
Hakkennes, E.2
Wong, S.3
Pechanek, G.4
-
9
-
-
84949189232
-
The MOLEN ρμ-Coded Processor
-
11th Intl. Conf. FPL'01, Springer-Verlag
-
S. Vassiliadis, S. Wong, and S. Cotofana. The MOLEN ρμ-Coded Processor. In 11th Intl. Conf. FPL'01, Springer-Verlag LNCS, vol. 2147, pp. 275-285, 2001.
-
(2001)
LNCS
, vol.2147
, pp. 275-285
-
-
Vassiliadis, S.1
Wong, S.2
Cotofana, S.3
-
11
-
-
0033718671
-
A C Compiler for a Processor with a Reconfigurable Functional Unit
-
A. Ye, N. Shenoy, and P. Banerjee. A C Compiler for a Processor with a Reconfigurable Functional Unit. In ACM/SIGDA Symp. on FPGAs, pp. 95-100, 2000.
-
(2000)
ACM/SIGDA Symp. on FPGAs
, pp. 95-100
-
-
Ye, A.1
Shenoy, N.2
Banerjee, P.3
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