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Volumn 6518, Issue PART 3, 2007, Pages

Non-linear methods for overlay control

Author keywords

Non linear; Overlay; Residuals

Indexed keywords

MATHEMATICAL MODELS; NONLINEAR CONTROL SYSTEMS; THROUGHPUT; WAFER BONDING;

EID: 35048897966     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.713092     Document Type: Conference Paper
Times cited : (12)

References (6)
  • 1
    • 35048897781 scopus 로고    scopus 로고
    • (Infineon Technology SC300, Dresden, Germany), Max Hoepfl, (Nikon Precision Europe GmbH, Langen, Germany), Overlay Improvement by Non-linear Error Correction and Nonlinear Error Control by APC
    • Choi, Dongsub, Jahnke Andreas, Schumacher Karl (Infineon Technology SC300, Dresden, Germany), Max Hoepfl, (Nikon Precision Europe GmbH, Langen, Germany), Overlay Improvement by Non-linear Error Correction and Nonlinear Error Control by APC, SPIE 2006 [6152-156]
    • (2006) SPIE , pp. 6152-6156
    • Choi, D.1    Andreas, J.2    Karl, S.3
  • 2
    • 25144461031 scopus 로고    scopus 로고
    • Design and Process Limited Yield at the 65nm Node and Beyond
    • Kevin Monahan and Brian Trafas, Design and Process Limited Yield at the 65nm Node and Beyond, Proc SPIE Vol. 5756, 230-239, (2004)
    • (2004) Proc SPIE , vol.5756 , pp. 230-239
    • Monahan, K.1    Trafas, B.2
  • 3
    • 25144476172 scopus 로고    scopus 로고
    • Progressive ArF Exposure Tool for the 65nm NodeLithography
    • Nobuyuki, IRIE, Masato HAMATANI and Masahiro NEI, Progressive ArF Exposure Tool for the 65nm NodeLithography, Proc. SPIE Vol. 5754, 725-733, (2005)
    • (2005) Proc. SPIE , vol.5754 , pp. 725-733
    • IRIE, N.1    Hamatani, M.2    Nei, M.3
  • 4
    • 35048858625 scopus 로고    scopus 로고
    • Lithography of International Technology Roadmap for Semiconductors 2006 Update
    • Lithography of International Technology Roadmap for Semiconductors 2006 Update
  • 6
    • 24644512813 scopus 로고    scopus 로고
    • Identifying Sources of Overlay Error in FinFET Technology
    • David Laidler (IMEC), Identifying Sources of Overlay Error in FinFET Technology, Proc. SPIE Vol. 5752, 80-90, (2005)
    • (2005) Proc. SPIE , vol.5752 , pp. 80-90
    • David Laidler, I.M.E.C.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.