Improving FPGA performance and area using an adaptive logic module

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 3203, Issue , 2004, Pages 135-144

  Hutton, Mike ^a   Schleicher, Jay ^a   Lewis, David ^b   Pedersen, Bruce ^a   Yuan, Richard ^a   Kaptanoglu, Sinan ^a   Baeckler, Gregg ^a   Ratchev, Boris ^a   Padalia, Ketan ^b   Bourgeault, Mark ^b   Lee, Andy ^a   Kim, Henry ^a   Saini, Rahul ^a  

^a Altera San Jose   (United States)

^b Altera Toronto Technology Center   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

FIELD PROGRAMMABLE GATE ARRAYS (FPGA); LOGIC DEVICES;

ADAPTIVE LOGIC MODULES; ARCHITECTURAL IMPROVEMENTS; LOGIC ELEMENTS;

BENCHMARKING;

EID: 35048851041     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-30117-2_16     Document Type: Article

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