Proving sequential consistency by model checking

Proceedings - IEEE International High-Level Design Validation and Test Workshop, HLDVT

Volumn 2001-January, Issue , 2001, Pages 103-108

  Braun, T ^a   Condon, A ^b   Hu, A J ^b   Juse, K S ^a   Laza, M ^b   Leslie, M ^b   Sharma, R ^b  

^a DARMSTADT UNIVERSITY OF TECHNOLOGY   (Germany)

^b UNIVERSITY OF BRITISH COLUMBIA   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

CACHE COHERENCE PROTOCOLS; FINITE STATE; MEMORY MODELING; REAL-WORLD; SEQUENTIAL CONSISTENCY; VERIFICATION TASK; VERIFYING SEQUENTIAL CONSISTENCIES; VIA MODELING;

MODEL CHECKING;

EID: 35048840368     PISSN: 15526674     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HLDVT.2001.972815     Document Type: Conference Paper

References (27)

1. S. V. Adve and K. Gharachorloo. Shared memory consistency models: A tutorial. IEEE Computer, pages 66-76, December 1996.
2. R. Alur, K. McMillan, and D. Peled. Model-checking of correctness conditions for concurrent objects. In Eleventh Symposium on Logic in Computer Science, pages 219-228. IEEE, 1996.
3. Ásgeir Th. Eiríksson and K. L. McMillan. Using formal verification/analysis methods on the critical path in system design: A case study. In P. Wolper, editor, Computer-Aided Verification: Seventh International Conference, pages 367-380. Springer-Verlag, July 1995. Lecture Notes in Computer Science Number 939.
4. T. Braun, A. E. Condon, A. J. Hu, K. S. Juse, M. Laza, M. Leslie, and R. Sharma. Proving sequential consistency by model checking. Technical Report TR-2001-03, Department of Computer Science, University of British Columbia, April 2001.
5. J. R. Burch, E. M. Clarke, K. L. McMillan, D. L. Dill, and L. J. Hwang. Symbolic model checking: 1020 states and beyond. In Conference on Logic in Computer Science, pages 428-439, 1990.
6. Information and Computation, Vol. 98, No. 2, June 1992.
7. E. Clarke, O. Grumberg, H. Hiraishi, S. Jha, D. Long, K. McMillan, and L. Ness. Verification of the Futurebus+ cache coherence protocol. Technical Report CMU-CS-92-206, Carnegie Mellon University, October 1992.
8. E. M. Clarke and E. A. Emerson. Design and synthesis of synchronization skeletons using branching time temporal logic. In D. Kozen, editor, Workshop on Logics of Programs, pages 52-71, May 1981. Published 1982 as Lecture Notes in Computer Science Number 131.
9. E. M. Clarke, O. Grumberg, H. Hiraishi, S. Jha, D. E. Long, K. L. McMillan, and L. A. Ness. Verification of the Futurebus+ cache coherence protocol. In L. Claesen, editor, 11th International Symposium on Computer Hardware Description Languages and their Applications. North-Holland, 1993.
10. A. E. Condon and A. J. Hu. Automatable verification of sequential consistency. In 13th Symposium on Parallel Algorithms and Architectures, pages 113-121. ACM, 2001.
11. D. L. Dill, A. J. Drexler, A. J. Hu, and C. H. Yang. Protocol verification as a hardware design aid. In International Conference on Computer Design. IEEE, October 1992.
12. T. A. Henzinger, S. Qadeer, and S. K. Rajamani. Verifying sequential consistency on shared-memory multiprocessor systems. In Computer-Aided Verification: 11th International Conference, pages 301-315. Springer, 1999. Lecture Notes in Computer Science Vol. 1633.
13. M. D. Hill. Multiprocessors should support simple memory-consistency models. IEEE Computer, pages 28-34, August 1998.
14. A. J. Hu and D. L. Dill. Reducing BDD size by exploiting functional dependencies. In 30th Design Automation Conference, pages 266-271. ACM/IEEE, 1993.
15. A. J. Hu, M. Fujita, and C. Wilson. Formal verification of the HAL S1 system cache coherence protocol. In International Conference on Computer Design, pages 438-444. IEEE, 1997.
16. C. N. Ip and D. L. Dill. Efficient verification of symmetric concurrent systems. In International Conference on Computer Design, pages 230-234. IEEE, October 1993.
17. L. Lamport. How to make a multiprocessor computer that correctly executes multiprocess programs. ACM Transactions on Computer, 28(9):690-691, September 1979.
18. K. L. McMillan and J. Schwalbe. Formal verification of the Gigamax cache-consistency protocol. In International Symposium on Shared Memory Multiprocessing, pages 242-251. Information Processing Society of Japan, 1991.
19. R. Nalumasu, R. Ghughal, A. Mokkedem, and G. Gopalakrishnan. The 'test model-checking' approach to the verification of formal memory models of multiprocessors. In Computer-Aided Verification: 10th International Conference, pages 464-476. Springer, 1998. Lecture Notes in Computer Science Vol. 1427.
20. M. Plakal, D. Sorin, A. Condon, and M. Hill. Lamport Clocks: Verifying a directory cache coherence protocol. In Symposium on Parallel Algorithms and Architectures, pages 67-76, 1998.
21. F. Pong, A. Nowatzyk, G. Aybay, and M. Dubois. Verifying distributed directory-based cache coherence protocols: S3.mp, a case study. In International Conference on Parallel Processing, EuroPar '95, August 1995.
22. S. Qadeer. On the verification of memory models of shared-memory multiprocessors. In Workshop on Formal Specification and Verification Methods for Shared Memory Systems. Unpublished Proceedings, October 31, 2000. Workshop affiliated with FMCAD 2000, Austin, TX.
23. C. Scheurich. Access Ordering and Coherence in Shared Memory Multiprocessors. PhD thesis, University of Southern California, May 1989. Published as USC Tech Report CENG 89-19.
24. U. Stern and D. L. Dill. Automatic verification of the SCI cache coherence protocol. In Correct Hardware Design and Verification Methods, CHARME '95, pages 21-34. IFIP WG 10.5 Advanced Research Working Conference, 1995.
25. U. Stern and D. L. Dill. Improved probabilistic verification by hash compaction. In P. Camurati and H. Eveking, editors, Correct Hardware Design and Verification Methods, IFIP WG 10.5 Advanced Research Working Conference, CHARME '95, pages 206-224, 1995. Frankfurt/Main, Germany, October 2-4.
26. P. Wolper and D. Leroy. Reliable hashing without collision detection. In Computer Aided Verification, Proc. 5th Int'l Workshop, volume 697 of Lecture Notes in Computer Science, pages 59-70. Springer-Verlag, June 1993.
27. L. Yang, D. Gao, J. Mostoufi, R. Joshi, and P. Loewenstein. System design methodology of UltraSPARC-I. In 32nd Design Automation Conference, pages 7-12. ACM/IEEE, 1995.