An analog performance estimator for improving the effectiveness of CMOS analog systems circuit synthesis

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 1999, Pages 406-411

  Nunez Aldana, Adrian ^a   Vemuri, Ranga ^a  

^a University of Cincinnati   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG PERFORMANCE; CIRCUIT SYNTHESIS; DESIGN PARAMETERS; ESTIMATION PROCESS; HIERARCHICAL ESTIMATION; LEVELS OF ABSTRACTION; PERFORMANCE MODEL; PERFORMANCE PARAMETERS;

AUTOMATION; DESIGN; ESTIMATION; EXHIBITIONS;

ANALOG CIRCUITS;

EID: 34748924573     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.1999.761156     Document Type: Conference Paper

References (20)

1. ACACIA. Release 2.0, user guides. ACACIA Group, 1994.
2. B. Antao and A. Brodersen. Techniques for synthesis of analog integrated circuits. IEEE Design & Test of Computers, pages 8-18, March 1992.
3. L. R. Carley, G. Gielen, R. A. Rutenbar, and W. Sansen. Synthesis tools for mixed-signal ics: Progress on frontend and backend strategies. DAC Proceedings, pages 298-303, June 1996.
4. M. Degrauwe, O. Nys, and E. Dijkstra. Idac: an interactive design tool for analog cmos circuits. IEEE Sol. st. Circ., 22:1106-16, December 1987.
5. N. Dhanwada, A. Nunez-Aldana, and R. Vemuri. Hierarchical constraint transformation using directed interval search for analog system synthesis. DATE Proceedings, March 1999.
6. A. Doboli and R. Vemuri. A vhdl-ams compiler and architecture generator for behavioral synthesis of analog systems. DATE Proceedings, March 1999.
7. G. E. Gielen, H. Walscharts, and W. Sansen. Isaac: A symbolic simulator for analog integrated circuits. IEEE J. Solid-State Circuits, 24(6):1587-1597, December 1989.
8. R. Gregorian and G. C. Temes. Analog MOS Integrated Circuits For Signal processing. Wiley series on Filters, 1986.
9. R. Harjani, R. Rutenbar, and L. Carley. Oasys: a framework for analog circuit synthesis. IEEE Trans CAD, 8(12):1247-1266, December 1989.
10. J. Harvey, M. Elmasry, and B. Leung. Staic: An interactive framework for synthesizing cmos and bicmos analog circuits. IEEE Trans. CAD, 11(11):1402-1415, Nov. 1992.
11. H. Koh, C. Sequin, and P. Gray. Opasyn: a compiler for cmos operational amplifiers. IEEE Trans. CAD, 9(2):113-125, Feb. 1990.
12. W. Kruiskamp and D. Leenaerts. Darwin: Cmos opamp synthesis by means of a genetic algorithm. 32nd Design Automation Conference, pages 433-438, Jun 1995.
13. W. Nye, D. Riley, A. Sangiovanni-Vicentelli, and A. Tits. Delight.spice: An optimization-based system for the design of integrated circuits. IEEE trans. CAD, 7(4):501-519, Apr. 1988.
14. E. S. Ochotta, R. A. Rutenbar, and L. R. Carley. Synthesis of high-performance analog circuits in astrx/oblx. IEEE Trans. CAD, 15:273-294, Mar. 1996.
15. L. Pillage and R. Rohrer. Asymptotic waveform evaluation for timing analysis. IEEE Trans. CAD, 9(4):352-366, Apr. 1990.
16. K. Swings andW. Sansen. Donald: a workbench for interactive design space exploration and sizing of analog circuits. proc. EDAC, pages 475-479, 1991.
17. K. Swings and W. Sansen. Ariadne: A constraint-base approach to computer-aided synthesis and modeling of analog integrated circuits. Analog Integrated Circuits and Signal Processing, 3:197-215, 1993.
18. A. Torralba, J. Chavez, and L. Franquelo. Circuit performance modeling by means of fuzzy logic. IEEE Transactions on CAD, 15:1391-8, Nov. 1996.
19. A. Torralba, J. Chavez, and L. Franquelo. Fasy: a fuzzy logic based tool for analog synthesis. IEEE Transactions on CAD, 15:705-15, July 1996.
20. R.Vemuri, N. Dhanwada, A. Nunez-Aldana, and P. Campisi. Vase: Vhdl-ams synthesis enviroment tools for mixed-signal system. Proc. EETimes Conference on analog and mixedsignal applications, pages 1C:77-1C:84, July 1997.