Balancing resistance and capacitance of signal interconnects for power saving

Proceedings of the IEEE 2007 International Interconnect Technology Conference - Digest of Technical Papers

Volumn , Issue , 2007, Pages 126-128

  Nguyen Hoang, V ^a   Doornbos, G ^a   Michelon, J ^a   Kumar, A ^a   Nackaerts, A ^b   Christie, P ^a  

^a NXP SEMICONDUCTORS   (Netherlands)

^b IMEC   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; COMPUTER SIMULATION; CONTACT RESISTANCE; ENERGY CONSERVATION; OSCILLATORS (ELECTRONIC);

CIRCUIT PERFORMANCE; LOW-OPERATIONAL-POWER (LOP); LOWER SUPPLY VOLTAGE; RING-OSCILLATOR;

OPTICAL INTERCONNECTS;

EID: 34748826942     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. R.J.O.M. Hoofman et al, Proceedings of IEEE International Interconnect Technology Conference (IITC), June 6-8, 2005, San Francisco, CA, USA, p. 85 - 87, 2005.
2. V. Nguyen Hoang, P. Christie, A. Heringa, A. Kumar and R. Ng, Proceedings of IEEE International Interconnect Technology Conference (IITC), June 6-8, 2005, San Francisco, CA, USA, p. 191 - 193, 2005.
3. A. P. Chandrakasan and R. W. Brodersen, Proc. IEEE (1995) 498
4. J.B. Burr and A.M. Peterson, proc. NASA VLSI Symp. (1991) 4.2.1
5. W. Steinhoegl, G. Schindler, G. Steinlesberger, M. Traving, M. Engelhardt, in Proceedings of IEEE International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), 3-5 Sept. 2003, Boston, MA, USA, p. 27 -30, 2003
6. V. Nguyen Hoang, A. Kumar and P. Christie, Proceedings of IEEE International Interconnect Technology Conference (IITC), June 5 - 7, 2006, San Francisco, CA, USA, p. 193 -195, 2005.