Electrical performance, reliability and microstructure of sub-45 nm copper damascene lines fabricated with TEOS backfill

Microelectronic Engineering

Volumn 84, Issue 11, 2007, Pages 2681-2685

  Leaming Sphabmixay, K ^a   Van Olmen, J ^a   Moon, K J ^a   Vanstreels, Kris ^b   D'Haen, J ^b   Tokei, Z ^a   List, S ^a   Beyer, G ^a  

^a IMEC   (Belgium)

^b HASSELT UNIVERSITY   (Belgium)

Author keywords

Effect of Scaling; Interconnects; Metallization and Barrier Materials; Process Integration

Indexed keywords

COPPER; ELECTRIC CONDUCTIVITY; ELECTROMIGRATION; MONOLAYERS; OPTICAL INTERCONNECTS; RELIABILITY THEORY;

ELECTRICAL PERFORMANCE; ELECTRON BACKSCATTERING DIFFRACTION; GRAIN ORIENTATION; PROCESS INTEGRATION;

TRENCHING;

EID: 34548853963     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mee.2007.06.009     Document Type: Article

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