Gate work function engineering for nanotube-based circuits

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2007, Pages 68-70

  Chen, Zhihong ^a   Appenzeller, Joerg ^a   Solomon, Paul M ^a   Lin, Yu Ming ^a   Avouris, Phaedon ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT THEORY; CMOS INTEGRATED CIRCUITS; NANOTUBES; PALLADIUM; WORK FUNCTION;

NANOTUBE-BASED CIRCUITS; WORK FUNCTION METAL GATES;

FIELD EFFECT TRANSISTORS;

EID: 34548832730     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2007.373591     Document Type: Conference Paper

References (5)

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2. J. Knoch and J. Appenzeller, "Carbon Nanotube Field-Effect Transistors - The Importance of Being Small," AmIware, Hardware Technology Drivers of Ambient Intelligence, Springer, pp. 371-402, 2006.
3. F. Leonard and J. Tersoff, "Role of Fermi-Level Pinning in Nanotube Schottky Diodes," Phys. Rev. Lett., vol. 84, pp. 4693-4696, 2000.
4. Z. Chen, et al., "An Integrated Logic Circuit Assembled on a Single Carbon Nanotube," Science, vol. 311, pp. 1735, 2006.
5. L.C. Castro and D.L. Pulfrey, "Method for Predicting fT for Carbon Nanotube FETs," IEEE Trans. Nanotechnology, vol. 4, pp. 699-704, 2005.