Fundamental bounds on power reduction during data-retention in standby SRAM

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2007, Pages 1867-1870

  Kumar, A ^a   Qin, H ^a   Ishwar, P ^b   Rabaey, J ^a   Ramchandran, K ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b BOSTON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DATA STORAGE EQUIPMENT; ERROR CORRECTION; RANDOM ACCESS STORAGE; REDUNDANCY; STANDBY POWER SERVICE; VOLTAGE CONTROL;

ALGEBRAIC CODING THEORY; ERROR-CONTROL CODES; LEAKAGE POWER; LOW-POWER DESIGN METHODS;

LEAKAGE CURRENTS;

EID: 34548822733     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/iscas.2007.378279     Document Type: Conference Paper

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