Designing efficient asynchronous memory operations using hardware copy engine: A case study with I/OAT

Proceedings - 21st International Parallel and Distributed Processing Symposium, IPDPS 2007; Abstracts and CD-ROM

Volumn , Issue , 2007, Pages

  Vaidyanathan, K ^a   Huang, W ^a   Chai, L ^a   Panda, D K ^a  

^a OHIO STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CACHE MEMORY; COMPUTER RESOURCE MANAGEMENT; DATA TRANSFER; INPUT OUTPUT PROGRAMS; PROGRAM PROCESSORS; RESPONSE TIME (COMPUTER SYSTEMS);

ASYNCHRONOUS MEMORY; CACHE UTILIZATION; MULTICORE ARCHITECTURES; PROCESSOR PERFORMANCE;

STORAGE ALLOCATION (COMPUTER);

EID: 34548735890     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPS.2007.370479     Document Type: Conference Paper

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