Architectural characterization of TCP/IP packet processing on the Pentium® M microprocessor

IEEE High-Performance Computer Architecture Symposium Proceedings

Volumn 10, Issue , 2004, Pages 152-161

  Makineni, Srihari ^a   Iyer, Ravi ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER OPERATING SYSTEMS; INTERNET; NETWORK PROTOCOLS; PACKET SWITCHING; SERVERS;

INTERNET PROTOCOL (IP); PACKET PROCESSING; TCP;

MICROPROCESSOR CHIPS;

EID: 2342525808     PISSN: 15300897     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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