Image computation and predicate refinement for RTL verilog using word level proofs

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2007, Pages 1325-1330

  Kroening, Daniel ^a   Sharygina, Natasha ^b  

^a ETH ZURICH   (Switzerland)

^b UNIVERSITY OF LUGANO   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL METHODS; IMAGE ANALYSIS; LSI CIRCUITS;

AUTOMATED ABSTRACTION; COMPUTING PREDICATE IMAGES; PREDICATE REFINEMENT;

MODEL CHECKING;

EID: 34548354626     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2007.364481     Document Type: Conference Paper

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