Using dynamic voltage scaling to reduce the configuration energy of run time reconfigurable devices

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2007, Pages 147-152

  Qu, Yang ^a   Soininen, Juha Pekka ^a   Nurmi, Jari ^b  

^a VTT TECHNICAL RESEARCH CENTRE OF FINLAND   (Finland)

^b TAMPERE UNIVERSITY OF TECHNOLOGY   (Finland)

Author keywords

[No Author keywords available]

Indexed keywords

GENETIC ALGORITHMS; PARALLEL PROCESSING SYSTEMS; PROBLEM SOLVING;

DYNAMIC VOLTAGE SCALING (DVS); RUN TIME RECONFIGURABLE DEVICES; SYSTEM IDLE TIME;

VOLTAGE CONTROL;

EID: 34548297518     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2007.364582     Document Type: Conference Paper

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