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Volumn , Issue , 2007, Pages 54-59

Survey of stochastic computation on factor graphs

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATION THEORY; DIGITAL CIRCUITS; GRAPH THEORY; HIGH SPEED NETWORKS; ITERATIVE DECODING;

EID: 34548279820     PISSN: 0195623X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISMVL.2007.53     Document Type: Conference Paper
Times cited : (24)

References (17)
  • 2
    • 33750068871 scopus 로고    scopus 로고
    • Stochastic iterative decoding on factor graphs
    • Brest, France, Sept
    • A. Rapley et al. Stochastic iterative decoding on factor graphs. In Proc. 3rd Int. Symp. on Turbo Codes and Related Topics, pages 507-510, Brest, France, Sept. 2003.
    • (2003) Proc. 3rd Int. Symp. on Turbo Codes and Related Topics , pp. 507-510
    • Rapley, A.1
  • 4
    • 0035440487 scopus 로고    scopus 로고
    • Stochastic neural computation I: Computational elements
    • Sept
    • B. Brown and H. Card. Stochastic neural computation I: Computational elements. IEEE Trans. on Computers, 50(9):891-905, Sept. 2001.
    • (2001) IEEE Trans. on Computers , vol.50 , Issue.9 , pp. 891-905
    • Brown, B.1    Card, H.2
  • 8
    • 0037421811 scopus 로고    scopus 로고
    • Iterative decoding using stochastic computation
    • Feb
    • V. Gaudet and A. Rapley. Iterative decoding using stochastic computation. Electron. Lett., 39(3):299-301, Feb. 2003.
    • (2003) Electron. Lett , vol.39 , Issue.3 , pp. 299-301
    • Gaudet, V.1    Rapley, A.2
  • 10
    • 0012223405 scopus 로고    scopus 로고
    • A system architecture solution for unreliable nanoelectronic devices
    • Dec
    • J. Han and P. Jonker. A system architecture solution for unreliable nanoelectronic devices. IEEE Trans. on Nanotechnology, 1(4):201-208, Dec. 2002.
    • (2002) IEEE Trans. on Nanotechnology , vol.1 , Issue.4 , pp. 201-208
    • Han, J.1    Jonker, P.2
  • 11
    • 33750911432 scopus 로고    scopus 로고
    • Designing logic circuits for probabilistic computation in the presence of noise
    • June
    • K. Nepal et al. Designing logic circuits for probabilistic computation in the presence of noise. In the Design Automation Conference, June 2005.
    • (2005) the Design Automation Conference
    • Nepal, K.1
  • 15
    • 0035246307 scopus 로고    scopus 로고
    • The capacity of low-density parity-check codes under message-passing decoding
    • Feb
    • T. J. Richardson and R. Urbanke. The capacity of low-density parity-check codes under message-passing decoding. IEEE Trans. Inform. Theory, 47:599-618, Feb. 2001.
    • (2001) IEEE Trans. Inform. Theory , vol.47 , pp. 599-618
    • Richardson, T.J.1    Urbanke, R.2
  • 17
    • 34548242432 scopus 로고    scopus 로고
    • Error-control decoders and probabilistic computation
    • Sendai, Japan, Oct
    • C. Winstead. Error-control decoders and probabilistic computation. In Tohoku Univ. 3rd SOIM-COE Conf., Sendai, Japan, Oct. 2005.
    • (2005) Tohoku Univ. 3rd SOIM-COE Conf
    • Winstead, C.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.