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Volumn , Issue , 2006, Pages 142-145

Oxide reliability: A new methodology for reliability evaluation at parametric testing

Author keywords

[No Author keywords available]

Indexed keywords

CHARGE TRAPPING; DIELECTRIC MATERIALS; EMBEDDED SYSTEMS; FLASH MEMORY; RELIABILITY ANALYSIS; STRESS ANALYSIS;

EID: 34548237944     PISSN: 19308841     EISSN: 23748036     Source Type: Conference Proceeding    
DOI: 10.1109/IRWS.2006.305230     Document Type: Conference Paper
Times cited : (2)

References (9)
  • 1
    • 0019656053 scopus 로고
    • Time zero dielectric reliability test by a ramp method
    • A.Berman,"Time zero dielectric reliability test by a ramp method", in Proceeding of the IRPS, pp.204-209, (1981)
    • (1981) Proceeding of the IRPS , pp. 204-209
    • Berman, A.1
  • 2
    • 0022223020 scopus 로고
    • Acceleration factors for thin gate oxide stressing
    • J.W.McPherson and D.Baglee, "Acceleration factors for thin gate oxide stressing" in Proceeding of the IRPS, pp.1-5 (1985)
    • (1985) Proceeding of the IRPS , pp. 1-5
    • McPherson, J.W.1    Baglee, D.2
  • 3
    • 0024122432 scopus 로고
    • Modeling and characterization of gate oxide reliability
    • J. Lee, I. Chen, and C. Hu, "Modeling and characterization of gate oxide reliability," IEEE Trans, on Electron. Dev., vol. 35, No. 12, pp.2268-2278, 1988.
    • (1988) IEEE Trans, on Electron. Dev , vol.35 , Issue.12 , pp. 2268-2278
    • Lee, J.1    Chen, I.2    Hu, C.3
  • 4
    • 0027640601 scopus 로고
    • Wafer level tunnel oxide reliability evaluation by means of the exponentially ramped current stress method
    • Aug
    • P.Cappelletti, P. Grezzi, F.Pio, C. Riva, "Wafer level tunnel oxide reliability evaluation by means of the exponentially ramped current stress method" in Microlectronics and Reliability, V 33, n 10, pp 1579-1596, (Aug. 1993)
    • (1993) Microlectronics and Reliability , vol.33 , Issue.10 , pp. 1579-1596
    • Cappelletti, P.1    Grezzi, P.2    Pio, F.3    Riva, C.4
  • 5
    • 85190268379 scopus 로고    scopus 로고
    • JESD35, JEDEC standards
    • JESD35, JEDEC standards
  • 8
    • 0029756926 scopus 로고
    • F Contamination Effect on Intrinsic and extrinsic Gate Oxide Reliability
    • G. Ghidini, D. Drera and F. Maugain, "F Contamination Effect on Intrinsic and extrinsic Gate Oxide Reliability", in Proceeding of the HRW, pp 92-97 (1995)
    • (1995) Proceeding of the HRW , pp. 92-97
    • Ghidini, G.1    Drera, D.2    Maugain, F.3
  • 9


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.