Oxide thinning in shallow trench isolation

IEEE International Reliability Physics Symposium Proceedings

Volumn , Issue , 2006, Pages 379-384

  Ghidini, Gabriella ^a   Bottini, Roberta ^a   Brazzelli, Daniela ^a   Galbiati, Nadia ^a   Mica, Isabella ^a   Morini, Adelaide ^a   Pavan, Alessia ^a   Polignano, Maria Luisa ^a   Vitali, Maria Elena ^a  

^a STMICROELECTRONICS   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 34250737352     PISSN: 15417026     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RELPHY.2006.251248     Document Type: Conference Paper

References (7)

1. A.Ghetti, D.Brazzelli, A.Benvenuti, G.Ghidini and A.Pavan, "Anomalous gate oxide conduction on isolation edges: analysis and process optimization", Proceedings of Workshop on Dielectric in Microelectronics 2003.
2. H.Lim, S.Lee, J.Youn, T.Ha, J.Kim, B.Choi, K.Kim, H.Kim, K.Kim, H.Byun, "The effect of STI process parameters on the integrity of dual gate oxides", 2001 IEEE International Reliability Physics Symposium Proceedings, 39,2001.
3. C.Lee, D.Park, N.Jo, C.Hwang, H.J.Kim, W.Lee, "Deep submicron CMOS technology using top-edge round STI and dual gate oxide for low power 256M-bit mobile DRAM", J.J.Applied Physics, v.42, 2003, pg.1892.
4. S.M.Sze, "VLSI Technoilogy, MC Graw Hill, 1983.
5. 2", Appl.Phys.Letters, vol.30, pg.290, 1977.
6. T.Tamura, N.Tanaka, M.Tagawa, N.Ohmae, M.Umeno, "Effect of thermal stresses on the low temperature thermal oxidation of Si", Jap.J.Appl.Phys.,1993.
7. I.De Wolf, H.Norstrom, H.E.Maes, "Process-induced mechanical stress in isolation structures studied by micro-Raman spectroscopy", J.Appl.Phys., vol.74, pg.4490, 1993.